Revert "avoid assert in the middle of the code"

[simgrid.git] / examples / platforms / two_hosts_platform_with_availability.xml

diff --git a/examples/platforms/two_hosts_platform_with_availability.xml b/examples/platforms/two_hosts_platform_with_availability.xml
index 3023615c4f3e38d533b39542b3ba14c62d3ba18f..5012186bf8a2f9fe460ed756031c1dafa6deba99 100644 (file)
--- a/examples/platforms/two_hosts_platform_with_availability.xml
+++ b/examples/platforms/two_hosts_platform_with_availability.xml
@@ -1,12 +1,10 @@
 <?xml version='1.0'?>
 <!DOCTYPE platform SYSTEM "http://simgrid.gforge.inria.fr/simgrid/simgrid.dtd">
 <platform version="4">
- 
- 
- <AS  id="AS0"  routing="Full">
-   <host id="Cpu A" speed="10f" availability_file="trace/trace_A.txt" state_file="trace/trace_A_failure.txt"/>
-   <host id="Cpu B" speed="10f" availability_file="trace/trace_B.txt"/>
-   <link id="LinkA" bandwidth="10MBps" latency="200ms"/>
-   <route src="Cpu A" dst="Cpu B"><link_ctn id="LinkA"/></route>
- </AS>
- </platform>
+<AS  id="AS0"  routing="Full">
+  <host id="Cpu A" speed="10f" availability_file="trace/trace_A.txt" state_file="trace/trace_A_failure.txt"/>
+  <host id="Cpu B" speed="10f" availability_file="trace/trace_B.txt"/>
+  <link id="LinkA" bandwidth="10MBps" latency="200ms"/>
+  <route src="Cpu A" dst="Cpu B"><link_ctn id="LinkA"/></route>
+</AS>
+</platform>