+ simcall_comm_test__set__comm(&state->internal_req, &state->internal_comm);
+ simcall_comm_test__set__result(&state->internal_req, value);
+ break;
+
+ case SIMCALL_COMM_WAIT:
+ state->internal_req = *req;
+ state->internal_comm = *(simcall_comm_wait__get__comm(req));
+ simcall_comm_wait__set__comm(&state->executed_req, &state->internal_comm);
+ simcall_comm_wait__set__comm(&state->internal_req, &state->internal_comm);
+ break;
+
+ case SIMCALL_COMM_TEST:
+ state->internal_req = *req;
+ state->internal_comm = *simcall_comm_test__get__comm(req);
+ simcall_comm_test__set__comm(&state->executed_req, &state->internal_comm);
+ simcall_comm_test__set__comm(&state->internal_req, &state->internal_comm);
+ break;
+
+ case SIMCALL_MC_RANDOM:
+ state->internal_req = *req;
+ if(value != simcall_mc_random__get__max(req)){
+ xbt_swag_foreach(process, simix_global->process_list){
+ procstate = &state->proc_status[process->pid];
+ if(process->pid == req->issuer->pid){
+ procstate->state = MC_MORE_INTERLEAVE;
+ break;
+ }
+ }
+ }