+The need and the demand for more computing power have been increasing since the
+birth of the first computing unit and they are not expected to slow down in the
+coming years. To meet these demands, at first the frequency of the CPU was regularly increased until reaching the thermal limit. Then, researchers and supercomputers
+constructors have been regularly increasing the number of computing cores and
+processors in supercomputers. Many parallel and distributed architectures, such as multi-core, clusters and grids, were implemented in order to obtain more computing power. This approach consists in using at the same time many computing nodes to solve a big problem that cannot be solved on a single node.
+These two approaches are the most common up to now to get more computing power, but they increase the energy consumption of the resulting computing architecture.
+Indeed, the power consumed by a processor exponentially increases when its frequency is increased and a platform consisting of $N$ computing nodes consumes as much as the sum of the power consumed by each computing node.
+As an example, the Chinese supercomputer
+Tianhe-2 had the highest FLOPS in November 2015 according to the Top500 list
+\cite{ref101}. However, it was also the most power hungry
+platform with more than 3 million cores consuming around 17.8 megawatts.
+Moreover, according to the U.S. annual energy outlook 2015
+\cite{ref102}, the price of energy for 1 megawatt per hour
+was approximately equal to \$70. Therefore, the price of the energy consumed by
+the Tianhe-2 platform is approximately more than \$10 million each year.
+Moreover, the platform generates a lot of heat and to prevent it from overheating a cooling
+infrastructure \cite{ref103} which consumes a lot of energy must be implemented.
+ High CPU's temperatures can also drastically increase its energy consumption, see \cite{ref104} for more details.
+An efficient computing platform must offer the highest number
+of FLOPS per watt possible, such as the Shoubu-ExaScaler from RIKEN
+which became the top of the Green500 list in November 2015 \cite{ref105}.
+This heterogeneous platform executes more than 7 GFlops per watt while only consuming
+50.32 kilowatts.
+
+For all these reasons energy reduction has become an important topic in the high performance
+computing (HPC) field. To tackle this problem, many researchers use DVFS (Dynamic
+Voltage and Frequency Scaling) operations which reduce dynamically the frequency and
+voltage of cores and thus their energy consumption \cite{ref49}.
+Indeed, modern CPUs offer a set of acceptable frequencies which are usually called gears, and the user or
+the operating system can modify the frequency of the processor according to its
+needs. However, DVFS reduces the number of FLOPS executed by the processor which may increase the execution
+time of the application running over that processor.
+Therefore researchers try to reduce the frequency to the minimum when processors are idle
+(waiting for data from other processors or communicating with other processors).
+Moreover, depending on their objectives, they use heuristics to find the best
+frequency scaling factor during the computation. If they aim for performance they choose
+the best frequency scaling factor that reduces the consumed energy while affecting as
+little as possible the performance. On the other hand, if they aim for energy
+reduction, the chosen frequency scaling factor must produce the most energy efficient
+execution without considering the degradation of the performance. Whereas, it is
+important to notice that lowering the frequency to the minimum value does not always
+give the most energy efficient execution due to energy leakage that increases the total energy consumption of the CPU when the execution time increases. However, a more important question is how to select the best frequency gears that minimize the total energy consumption and the maximize the performance of a parallel application, running over a parallel platform, at the same time?
+
+
+
