added clk/rst link when creating a block

[blast.git] / FunctionalBlock.cpp

diff --git a/FunctionalBlock.cpp b/FunctionalBlock.cpp
index 1ec0c11ecff735e63d5351388b43cd1b92d33242..ab9611d9f9aa3e9fc2276068418cf93b44cf76ee 100644 (file)
--- a/FunctionalBlock.cpp
+++ b/FunctionalBlock.cpp
@@ -8,7 +8,7 @@
 #include "ArithmeticEvaluator.h"\r
 \r
 \r
 #include "ArithmeticEvaluator.h"\r
 \r
 \r

-FunctionalBlock::FunctionalBlock(GroupBlock *_parent, ReferenceBlock *_reference) throw(Exception) :  AbstractBlock() {\r
+FunctionalBlock::FunctionalBlock(GroupBlock *_parent, ReferenceBlock *_reference, bool createIfaces) throw(Exception) :  AbstractBlock() {\r

   //if (! _reference->isReferenceBlock()) throw(Exception(BLOCK_INVALID_TYPE));\r
   //if (! _group->isGroupBlock()) throw(Exception(BLOCK_INVALID_TYPE));\r
   reference = _reference;\r
   //if (! _reference->isReferenceBlock()) throw(Exception(BLOCK_INVALID_TYPE));\r
   //if (! _group->isGroupBlock()) throw(Exception(BLOCK_INVALID_TYPE));\r
   reference = _reference;\r


@@ -30,6 +30,10 @@ FunctionalBlock::FunctionalBlock(GroupBlock *_parent, ReferenceBlock *_reference
   delta = -1;\r
   evaluator = NULL;\r
 \r
   delta = -1;\r
   evaluator = NULL;\r
 \r

+  if (createIfaces) {\r
+    populate();\r
+  }\r
+\r

 }\r
 \r
 FunctionalBlock::~FunctionalBlock() {\r
 }\r
 \r
 FunctionalBlock::~FunctionalBlock() {\r


@@ -96,7 +100,7 @@ void FunctionalBlock::populate() {
     addInterface(inter);\r
     /* WARNING FOR THE FUTURE :\r
        in case of there are several clock interfaces ofr that block\r
     addInterface(inter);\r
     /* WARNING FOR THE FUTURE :\r
        in case of there are several clock interfaces ofr that block\r

-       it would be a godd idea to make the user choose which one\r
+       it would be a good idea to make the user choose which one\r

        must be connected to defautl clk.\r
        Presently, the first encountered is chosen\r
      */\r
        must be connected to defautl clk.\r
        Presently, the first encountered is chosen\r
      */\r


@@ -122,18 +126,6 @@ void FunctionalBlock::populate() {
       }       \r
     }\r
   }\r
       }       \r
     }\r
   }\r

-\r
-  // connect clk and rst to group clk/rst or to clkrstgen\r
-  if ((name != "clkrstgen") && (parent != NULL)) {\r
-    try {\r
-      connectClkReset();\r
-    }\r
-    catch(Exception e) {\r
-      AbstractBlock* source = (AbstractBlock *)(e.getSource());\r
-      cerr << qPrintable(source->getName()) << ":" << qPrintable(e.getMessage()) << endl;\r
-      throw(e);\r
-    }\r
-  }\r

 }\r
 \r
 QString FunctionalBlock::getReferenceXmlFile() {\r
 }\r
 \r
 QString FunctionalBlock::getReferenceXmlFile() {\r


@@ -441,12 +433,17 @@ QList<char> FunctionalBlock::expandPatternRecur(const QString& patternIn, int *o
       catch(Exception e) {\r
         throw(e);\r
       }\r
       catch(Exception e) {\r
         throw(e);\r
       }\r

+      if (repeat == 0) {\r
+        // remove the last\r
+        patternOut.removeLast();\r
+      }\r
+      else {\r

       // repeat just the last value in currentGroup\r
       // repeat just the last value in currentGroup\r

-      char last = patternOut.last();\r
-      //cout << "repeat last char " << repeat << " times : " << (int)last << endl;\r
-      \r
-      for(int i=1;i<(int)repeat;i++) {\r
-        patternOut.append(last);\r
+        char last = patternOut.last();\r
+        //cout << "repeat last char " << repeat << " times : " << (int)last << endl;\r
+        for(int i=1;i<(int)repeat;i++) {\r
+          patternOut.append(last);\r
+        }\r

       }\r
     }    \r
     *offset += 1;\r
       }\r
     }    \r
     *offset += 1;\r


@@ -470,15 +467,21 @@ QList<char> FunctionalBlock::expandPatternRecur(const QString& patternIn, int *o
     catch(Exception e) {\r
       throw(e);\r
     }\r
     catch(Exception e) {\r
       throw(e);\r
     }\r

-    /*\r
+    if (repeat == 0) {\r
+      QList<char> voidList;\r
+      return voidList;\r
+    }\r
+    else {\r
+      /*\r

     cout << "repeat last group " << repeat << " times : ";\r
     foreach (char c, currentGroup) cout <<(int)c;\r
     cout << "repeat last group " << repeat << " times : ";\r
     foreach (char c, currentGroup) cout <<(int)c;\r

-    cout << endl;  \r
+    cout << endl;\r

     */\r
     */\r

-    QList<char> single = patternOut;\r
-    for(int i=1;i<(int)repeat;i++) {\r
-      patternOut.append(single);\r
-    }    \r
+      QList<char> single = patternOut;\r
+      for(int i=1;i<(int)repeat;i++) {\r
+        patternOut.append(single);\r
+      }\r
+    }\r

   }  \r
   return patternOut;\r
 }\r
   }  \r
   return patternOut;\r
 }\r


@@ -1315,9 +1318,23 @@ int FunctionalBlock::createTriggers() {
   return triggers.size();\r
 }\r
 \r
   return triggers.size();\r
 }\r
 \r

+QList<QString> FunctionalBlock::getExternalResources() {\r
+\r
+  BlockImplementation* impl = reference->getImplementations().at(0); // for now only take first impl available\r
+  QList<QString> list = impl->getResources();\r
+  foreach(QString s, list) {\r
+    cout << qPrintable(s) << " ";\r
+  }\r
+  cout << endl;\r
+\r
+  return list;\r
+}\r
+\r
+\r

 void FunctionalBlock::generateVHDL(const QString& path) throw(Exception){\r
     \r
 void FunctionalBlock::generateVHDL(const QString& path) throw(Exception){\r
     \r

-  BlockImplementation* impl = reference->getImplementations().at(0); // for now only take first impl available\r
+  BlockImplementation* impl = reference->getImplementations().at(0); // for now only take first impl available  \r
+\r

   QFile implFile(impl->getXmlFile());\r
 \r
   // reading in into QDomDocument\r
   QFile implFile(impl->getXmlFile());\r
 \r
   // reading in into QDomDocument\r


@@ -1445,142 +1462,122 @@ void FunctionalBlock::generateLibraries(QTextStream& out, QDomElement &elt) thro
       QDomElement eltPack = nodePack.toElement();\r
       QString namePack = eltPack.attribute("name","none");\r
       QString usePack = eltPack.attribute("use","none");\r
       QDomElement eltPack = nodePack.toElement();\r
       QString namePack = eltPack.attribute("name","none");\r
       QString usePack = eltPack.attribute("use","none");\r

-      out << "use " << nameLib << "." << namePack << "." << usePack << endl;\r
+      out << "use " << nameLib << "." << namePack << "." << usePack << ";" << endl;\r

     }\r
     out << endl;\r
   }\r
 }\r
 \r
     }\r
     out << endl;\r
   }\r
 }\r
 \r

-void FunctionalBlock::generateEntity(QTextStream& out, bool hasController) throw(Exception) {\r
+\r
+void FunctionalBlock::generateEntityOrComponentBody(QTextStream& out, int indentLevel, bool hasController) throw(Exception) {\r

 \r
   int i=0;\r
 \r
   int i=0;\r

+  QString indent = "";\r
+  for(i=0;i<indentLevel;i++) {\r
+    indent += " ";\r
+  }\r

   \r
   //QList<BlockParameter*> listParams = reference->getParameters();\r
   QList<AbstractInterface*> listInputs = getInputs();\r
   QList<AbstractInterface*> listOutputs = getOutputs();\r
   \r
   //QList<BlockParameter*> listParams = reference->getParameters();\r
   QList<AbstractInterface*> listInputs = getInputs();\r
   QList<AbstractInterface*> listOutputs = getOutputs();\r

-  QList<AbstractInterface*> listBidirs = getBidirs();\r
-  QString typePort, namePort;\r
-\r
-  out << "entity " << name << " is" << endl;\r
-\r
-\r
-  /* TODO : rewrite the generation to take into acocunt the new object hierarchy */\r
+  QList<AbstractInterface*> listBidirs = getBidirs();    \r

 \r
   // Generation of the generics\r
   QList<BlockParameter*> listGenerics = getGenericParameters();\r
   if ((!listGenerics.isEmpty()) || (hasController)) {\r
 \r
   // Generation of the generics\r
   QList<BlockParameter*> listGenerics = getGenericParameters();\r
   if ((!listGenerics.isEmpty()) || (hasController)) {\r

-    out << "  generic (" << endl;\r
+    out << indent << "  generic (" << endl;\r

     if (hasController) {\r
     if (hasController) {\r

-      out << "    wb_data_width : integer = 16;" << endl;\r
-      out << "    wb_addr_width : integer = 12";\r
-      if (!listGenerics.isEmpty()) out << ";";\r
+      out << indent << "    wb_data_width : integer = 16;" << endl;\r
+      out << indent << "    wb_addr_width : integer = 12";\r
+      if (!listGenerics.isEmpty()) out << indent << ";";\r

       out << endl;\r
     }\r
     for(i=0;i<listGenerics.size()-1;i++) {\r
       out << endl;\r
     }\r
     for(i=0;i<listGenerics.size()-1;i++) {\r

-      out << "    " << listGenerics.at(i)->toVHDL(BlockParameter::Entity, 0) << endl;\r
+      out << indent << "    " << listGenerics.at(i)->toVHDL(BlockParameter::Entity, 0) << endl;\r

     }\r
     }\r

-    out << "    " << listGenerics.at(i)->toVHDL(BlockParameter::Entity,BlockParameter::NoComma) << endl;\r
+    out << indent << "    " << listGenerics.at(i)->toVHDL(BlockParameter::Entity,BlockParameter::NoComma) << endl;\r

 \r
 \r

-    out << "    );" << endl;\r
+    out << indent << "    );" << endl;\r

   }\r
 \r
   }\r
 \r

-  out << "  port (" << endl;\r
+  out << indent << "  port (" << endl;\r
+\r
+  QString ports = "";\r
+  QTextStream outPorts(&ports);\r

 \r
   // Generation of the clk & rst signals\r
 \r
   // Generation of the clk & rst signals\r

-  out << "    -- clk/rst" << endl;\r
+  outPorts << indent << "    -- clk/rst" << endl;\r

   foreach(AbstractInterface* iface, listInputs) {\r
     if(iface->getPurpose() == AbstractInterface::Clock || iface->getPurpose() == AbstractInterface::Reset) {\r
   foreach(AbstractInterface* iface, listInputs) {\r
     if(iface->getPurpose() == AbstractInterface::Clock || iface->getPurpose() == AbstractInterface::Reset) {\r

-      out << "    " << iface->getName() << " : in std_logic;" << endl;\r
+      outPorts << indent << "    " << iface->getName() << " : in std_logic;" << endl;\r
+    }\r
+  }\r
+  foreach(AbstractInterface* iface, listOutputs) {\r
+    if(iface->getPurpose() == AbstractInterface::Clock || iface->getPurpose() == AbstractInterface::Reset) {\r
+      outPorts << indent << "    " << iface->getName() << " : out std_logic;" << endl;\r

     }\r
   }\r
 \r
   if (hasController) {\r
     // Generation of the wishbone signals\r
     }\r
   }\r
 \r
   if (hasController) {\r
     // Generation of the wishbone signals\r

-    out << "    -- registers r/w via wishbone" << endl;\r
+    outPorts << indent << "    -- registers r/w via wishbone" << endl;\r

     QList<BlockParameter*> listWB = reference->getWishboneParameters();\r
     for(i=0;i<listWB.size()-1;i++) {\r
     QList<BlockParameter*> listWB = reference->getWishboneParameters();\r
     for(i=0;i<listWB.size()-1;i++) {\r

-      out << "    " << listWB.at(i)->toVHDL(BlockParameter::Entity, 0) << endl;\r
+      outPorts << indent << "    " << listWB.at(i)->toVHDL(BlockParameter::Entity, 0) << endl;\r

     }\r
     }\r

-    out << "    " << listWB.at(i)->toVHDL(BlockParameter::Entity,BlockParameter::NoComma) << endl;\r
+    outPorts << indent << "    " << listWB.at(i)->toVHDL(BlockParameter::Entity,BlockParameter::NoComma) << endl;\r

   }\r
 \r
   }\r
 \r

-\r
-  int count = 0;\r
-  foreach(AbstractInterface* iface, getInterfaces()) {\r
-    if((iface->getPurpose() == AbstractInterface::Data)||(iface->getPurpose() == AbstractInterface::Control)) count++;\r
-  }\r

   // Generation of the data/control signals\r
 \r
   // Generation of the data/control signals\r
 \r

-  int flag = 0;\r
-  bool first = true;\r
-\r
-  foreach(AbstractInterface* iface, listInputs) {\r
-    if(iface->getPurpose() == AbstractInterface::Data) {\r
-      if (first) {\r
-        out << "    -- input data ports" << endl;\r
-        first = false;\r
-      }\r
-      count--;\r
-      if (count == 0) flag = AbstractInterface::NoComma;\r
-      out << "    " << iface->toVHDL(AbstractInterface::Entity, flag) << endl;\r
+  QList<AbstractInterface*> listIface = getInterfaces(AbstractInterface::Input, AbstractInterface::Data);\r
+  if (listIface.size()>0) {\r
+    outPorts << indent << "    -- input data ports" << endl;\r
+    foreach(AbstractInterface* iface, listIface) {\r
+      outPorts << indent << "    " << iface->toVHDL(AbstractInterface::Entity, 0) << endl;\r

     }\r
   }\r
     }\r
   }\r

-  first = true;\r
-  foreach(AbstractInterface* iface, listInputs) {\r
-    if(iface->getPurpose() == AbstractInterface::Control) {\r
-      if (first) {\r
-        out << "    -- input control ports" << endl;\r
-        first = false;\r
-      }\r
-      count--;\r
-      if (count == 0) flag = AbstractInterface::NoComma;\r
-      out << "    " << iface->toVHDL(AbstractInterface::Entity, flag) << endl;\r
+  listIface = getInterfaces(AbstractInterface::Input, AbstractInterface::Control);\r
+  if (listIface.size()>0) {\r
+    outPorts << indent << "    -- input control ports" << endl;\r
+    foreach(AbstractInterface* iface, listIface) {\r
+      outPorts << indent << "    " << iface->toVHDL(AbstractInterface::Entity, 0) << endl;\r

     }\r
   }\r
     }\r
   }\r

-  first = true;\r
-  foreach(AbstractInterface* iface, listOutputs) {\r
-    if(iface->getPurpose() == AbstractInterface::Data) {\r
-      if (first) {\r
-        out << "    -- output data ports" << endl;\r
-        first = false;\r
-      }\r
-      count--;\r
-      if (count == 0) flag = AbstractInterface::NoComma;\r
-      out << "    " << iface->toVHDL(AbstractInterface::Entity, flag) << endl;\r
+  listIface = getInterfaces(AbstractInterface::Output, AbstractInterface::Data);\r
+  if (listIface.size()>0) {\r
+    outPorts << indent << "    -- output data ports" << endl;\r
+    foreach(AbstractInterface* iface, listIface) {\r
+      outPorts << indent << "    " << iface->toVHDL(AbstractInterface::Entity, 0) << endl;\r

     }\r
   }\r
     }\r
   }\r

-  first = true;\r
-  foreach(AbstractInterface* iface, listOutputs) {\r
-    if(iface->getPurpose() == AbstractInterface::Control) {\r
-      if (first) {\r
-        out << "    -- output control ports" << endl;\r
-        first = false;\r
-      }\r
-      count--;\r
-      if (count == 0) flag = AbstractInterface::NoComma;\r
-      out << "    " << iface->toVHDL(AbstractInterface::Entity, flag) << endl;\r
+  listIface = getInterfaces(AbstractInterface::Output, AbstractInterface::Control);\r
+  if (listIface.size()>0) {\r
+    outPorts << indent << "    -- output control ports" << endl;\r
+    foreach(AbstractInterface* iface, listIface) {\r
+      outPorts << indent << "    " << iface->toVHDL(AbstractInterface::Entity, 0) << endl;\r

     }\r
   }\r
     }\r
   }\r

-  first = true;\r
-  foreach(AbstractInterface* iface, listBidirs) {\r
-    if(iface->getPurpose() == AbstractInterface::Data) {\r
-      if (first) {\r
-        out << "    -- bidirs data ports" << endl;\r
-        first = false;\r
-      }\r
-      count--;\r
-      if (count == 0) flag = AbstractInterface::NoComma;\r
-      out << "    " << iface->toVHDL(AbstractInterface::Entity, flag) << endl;\r
+  listIface = getInterfaces(AbstractInterface::InOut, AbstractInterface::Data);\r
+  if (listIface.size()>0) {\r
+    outPorts << indent << "    -- bidirs data ports" << endl;\r
+    foreach(AbstractInterface* iface, listIface) {\r
+      outPorts << indent << "    " << iface->toVHDL(AbstractInterface::Entity, 0) << endl;\r

     }\r
   }\r
     }\r
   }\r

-  out << "    );" << endl << endl;\r
-  out << "end " << name << ";" << endl << endl;\r
+\r
+  ports.chop(2);\r
+  ports += "\n";\r
+  out << ports;\r
+  out << indent << "    );" << endl << endl;\r
+\r

 }\r
 \r
 void FunctionalBlock::generateArchitecture(QTextStream& out, QDomElement &elt ) throw(Exception) {\r
 }\r
 \r
 void FunctionalBlock::generateArchitecture(QTextStream& out, QDomElement &elt ) throw(Exception) {\r

+  QRegularExpression rxPort("@\\{([a-zA-Z0-9_]+)\\}");\r

   QString expr;\r
   QString code = elt.text();\r
   QString expr;\r
   QString code = elt.text();\r

-  cout << qPrintable(code) << endl;\r
+  //cout << qPrintable(code) << endl;\r

   out << "architecture rtl of " << name << " is" << endl;\r
 \r
   QStringList listLine = code.split("\n");\r
   out << "architecture rtl of " << name << " is" << endl;\r
 \r
   QStringList listLine = code.split("\n");\r


@@ -1606,12 +1603,72 @@ void FunctionalBlock::generateArchitecture(QTextStream& out, QDomElement &elt )
     }\r
 */\r
     if(line.contains("@{")) {\r
     }\r
 */\r
     if(line.contains("@{")) {\r

-      out << line << endl;\r
+      QMap<QString,QString> modifs;\r
+      //cout << qPrintable(line) << endl;\r
+      QRegularExpressionMatchIterator matchPort = rxPort.globalMatch(line);\r
+      while(matchPort.hasNext()) {\r
+        QRegularExpressionMatch m = matchPort.next();\r
+        QString refName = m.captured(1);\r
+        AbstractInterface* refIface = reference->getIfaceFromName(refName);\r
+        QString funName = getIfaceUserName(refIface);\r
+        if (!funName.isEmpty()) {\r
+          modifs.insert(m.captured(0),funName);\r
+          //cout << "replace " << qPrintable(refIface->getName()) << " by " << qPrintable(funIface->getName()) << endl;\r
+        }\r
+      }\r
+      QMapIterator<QString,QString> iterM(modifs);\r
+      while(iterM.hasNext()) {\r
+        iterM.next();\r
+        QString oldName = iterM.key();\r
+        QString newName = iterM.value();\r
+        line.replace(oldName,newName);\r
+      }\r

     }\r
     }\r

+    out << line << endl;\r

   }\r
   }\r

+\r
+  out << "end rtl;" << endl;\r

 }\r
 \r
 void FunctionalBlock::generateController(QTextStream &out) throw(Exception) {\r
   \r
 }\r
 \r
 }\r
 \r
 void FunctionalBlock::generateController(QTextStream &out) throw(Exception) {\r
   \r
 }\r
 \r

+QString FunctionalBlock::getIfaceUserName(AbstractInterface* refIface) {\r
+\r
+  if (! refIface->isReferenceInterface()) return "";\r
+\r
+  AbstractInterface* funcIface = NULL;\r
+\r
+  if (refIface->getDirection() == AbstractInterface::Input) {\r
+    foreach(AbstractInterface* iface, getInputs()) {\r
+      FunctionalInterface* fi = AI_TO_FUN(iface);\r
+      if (fi->getReference() == refIface) {\r
+        funcIface = iface;\r
+        break;\r
+      }\r
+    }\r
+  }\r
+  else if (refIface->getDirection() == AbstractInterface::Output) {\r
+    foreach(AbstractInterface* iface, getOutputs()) {\r
+      FunctionalInterface* fi = AI_TO_FUN(iface);\r
+      if (fi->getReference() == refIface) {\r
+        funcIface = iface;\r
+        break;\r
+      }\r
+    }\r
+  }\r
+  else if (refIface->getDirection() == AbstractInterface::InOut) {\r
+    foreach(AbstractInterface* iface, getBidirs()) {\r
+      FunctionalInterface* fi = AI_TO_FUN(iface);\r
+      if (fi->getReference() == refIface) {\r
+        funcIface = iface;\r
+        break;\r
+      }\r
+    }\r
+  }\r
+  if (funcIface == NULL) return "";\r
+\r
+  return funcIface->getName();\r
+}\r
+\r