finished VHDL gen. (but have to test further

[blast.git] / lib / implementations / checker_impl.xml

diff --git a/lib/implementations/checker_impl.xml b/lib/implementations/checker_impl.xml
index 2f6167a6ee22c11b8590e5b1bdfa62bb7a196199..a9d780df628d087b790eac69f2f7641d47808e9b 100644 (file)
--- a/lib/implementations/checker_impl.xml
+++ b/lib/implementations/checker_impl.xml
@@ -55,8 +55,6 @@ end if;
 end if;
 
 end process check_process;
-
-end rtl;
 </architecture>
   <patterns>
     <delta value="1"/>