#define PROJECT_LIB (quint16)32
#define ANALYSIS_ANALYZE (quint16)1
+#define ANALYSIS_GENERATE (quint16)2
#define OP_ADD (quint8)0
#define OP_REM (quint8)1
// actions for graph analysis
QAction *graphAnalysis;
+ QAction *generateVHDL;
// actions for tools
QAction *vhdlToXmlAct;
void slotOpenBlockLibrary();
void slotGraphAnalysis();
+ void slotGenerateVHDL();
void slotVHDLToXml();