finished VHDL gen

[blast.git] / lib / references / rgb3sx8_to_gs.xml

diff --git a/lib/references/rgb3sx8_to_gs.xml b/lib/references/rgb3sx8_to_gs.xml
index 9271adc082b30b3dbf8f4ad7e42094255cacaffe..10cea03c4826934ada29e559b13918c95e881928 100644 (file)
--- a/lib/references/rgb3sx8_to_gs.xml
+++ b/lib/references/rgb3sx8_to_gs.xml
@@ -16,11 +16,11 @@
     <inputs>
       <input endian="little" type="boolean" purpose="clock" multiplicity="1" width="1" name="clk"/>
       <input endian="little" type="boolean" purpose="reset" multiplicity="1" width="1" name="reset"/>
-      <input endian="little" type="natural" purpose="data" multiplicity="1" width="7" name="rgb_in"/>
+      <input endian="little" type="natural" purpose="data" multiplicity="1" width="8" name="rgb_in"/>
       <control iface="rgb_in"/>
     </inputs>
     <outputs>
-      <output endian="little" type="natural" purpose="data" multiplicity="1" width="7" name="gs_out"/>
+      <output endian="little" type="natural" purpose="data" multiplicity="1" width="8" name="gs_out"/>
       <control iface="gs_out"/>
     </outputs>
   </interfaces>