nearly finished GroupBlock VHDL gen

[blast.git] / FunctionalBlock.h

diff --git a/FunctionalBlock.h b/FunctionalBlock.h
index 404ce176b43e8e13ceb5564f236acf0c09f21cfb..7bba2c8ed273565cc6a89c6f751e888d87cfa40e 100644 (file)
--- a/FunctionalBlock.h
+++ b/FunctionalBlock.h
@@ -51,6 +51,8 @@ public:
   // others\r
 \r
   void populate(); // create parameters and interface from reference block\r
+  void generateVHDL(const QString& path) throw(Exception); // main entry to generate the VHDL code  \r
+\r
   void parametersValidation(QList<AbstractBlock *> *checkedBlocks, QList<AbstractBlock*>* blocksToConfigure);\r
 \r
   QString getReferenceXmlFile();\r
@@ -74,6 +76,7 @@ private:
   void clearProductionPattern();\r
   void createInputPattern() throw(Exception);\r
   void clearInputPattern();\r
+  void clearOutputPattern();\r
   void clearAdmittanceDelays();\r
   int createTriggers(); // compute the clock cycle at which the block is triggered\r
   \r
@@ -152,6 +155,12 @@ private:
   */\r
   void shiftRightPattern(const QMap<AbstractInterface*, QList<char>* >& pattern, int offset);\r
 \r
+  void generateComments(QTextStream& out, QDomElement &elt, QString coreFile) throw(Exception); // generates comments from <comments> element\r
+  void generateLibraries(QTextStream& out, QDomElement &elt) throw(Exception); // generates libraries from <libraries> element\r
+  void generateArchitecture(QTextStream& out, QDomElement &elt ) throw(Exception); // generate the architecture using <architecture> element\r
+  void generateController(QTextStream& out) throw(Exception); // generate the wishbone controller of the block\r
+  void generateEntityOrComponentBody(QTextStream& out, int indentLevel, bool hasController=false) throw(Exception); // generate the entity/compo body using reference\r
+\r
   QMap<AbstractInterface*, QList<char>* > consumptionPattern;\r
   QMap<AbstractInterface*, QString > admittanceCyclic; // the admittance expressed as prologue-cyclic part-epilogue, deduced from admittance\r
   QMap<AbstractInterface*, QList<char>* > admittance; // the admittance taking into account nb exec.\r