+ void checkInputPatternCompatibility() throw(Exception);
+ void computeOutputPattern(int nbExec = -1) throw(Exception);
+ void computeAdmittanceDelays() throw(Exception);
+
+ void generateVHDL(const QString& path) throw(Exception); // main entry to generate the VHDL code
+
+private:
+ // patterns
+ /* NB: in opposition to FunctionalBlock, the input pattern and output pattern of a block
+ is not computed but just deduced from the output pattern of functional interfaces that
+ are connected to some block interfaces. Thus, there is no need to have an outputPattern QMap linking
+ interfaces and patterns as in FunctionalBlock.
+ Thus, the output patterns are directly set/retrieved from interfaces.
+
+ */
+ /*!
+ * \brief createInputPattern
+ * Since input GroupInterface are just tunnels to input interfaces of inner blocks, they must
+ * have an output pattern that can be provided to inner interfaces. That outpu pattern is just
+ * found by taking the output pattern of the connectedFrom interface.
+ */
+ void createInputPattern();
+
+ void generateComments(QTextStream& out, QDomElement &elt, QString coreFile) throw(Exception); // generates comments from <comments> element
+ void generateLibraries(QTextStream& out, QDomElement &elt) throw(Exception); // generates libraries from <libraries> element
+ void generateEntity(QTextStream& out, bool hasController=false) throw(Exception); // generate the entity using reference
+ void generateArchitecture(QTextStream& out, QDomElement &elt ) throw(Exception); // generate the architecture using <architecture> element
+ void generateController(QTextStream& out) throw(Exception); // generate the wishbone controller of the block
+