finished VHDL gen. (but have to test further

[blast.git] / MainWindow.cpp

diff --git a/MainWindow.cpp b/MainWindow.cpp
index 212e54dd6cf9a7f7a8f91b0c052cb2575fcc051f..166dfa29511d591682f0769da801aa776297cd82 100644 (file)
--- a/MainWindow.cpp
+++ b/MainWindow.cpp
@@ -451,28 +451,8 @@ void MainWindow::slotGraphAnalysis() {
 
 void MainWindow::slotGenerateVHDL() {
 
 
 void MainWindow::slotGenerateVHDL() {
 

-  QDir baseDir(params->projectPath);
-  if (!baseDir.exists()) {
-    cerr << "Project path " << qPrintable(params->projectPath) << " no longer exists. First, recreate it and put the project file within. Then retry to generate." << endl;
-    return;
-  }
-  if (! baseDir.exists("src")) {
-    baseDir.mkdir("src");
-  }
-  if (! baseDir.exists("testbench")) {
-    baseDir.mkdir("testbench");
-  }
-  if (! baseDir.exists("Makefile")) {
-    QFile make("/home/sdomas/Projet/Blast/code/blast/Makefile-isim");
-    QString dest = params->projectPath;
-    dest += "/Makefile";
-    make.copy(dest);
-  }
-
-  QString dest = params->projectPath;
-  dest += "/src/";

   try {
   try {

-    params->getGraph()->generateVHDL(dest);
+    dispatcher->generateVHDL();

   }
   catch(Exception e) {
     cerr << qPrintable(e.getMessage()) << endl;
   }
   catch(Exception e) {
     cerr << qPrintable(e.getMessage()) << endl;