added clk/rst link when creating a block

[blast.git] / lib / references / clkdomain_convert_1024x8.xml

diff --git a/lib/references/clkdomain_convert_1024x8.xml b/lib/references/clkdomain_convert_1024x8.xml
index 40ee12ff311181517948cd63ca47b34c01fdefdd..1df9cf1e4c4604a05631bda95c65b8bf96dffddf 100644 (file)
--- a/lib/references/clkdomain_convert_1024x8.xml
+++ b/lib/references/clkdomain_convert_1024x8.xml
@@ -2,7 +2,7 @@
 <block version="0.1">
   <informations>
     <name>clkdomain_convert_1024x8</name>
 <block version="0.1">
   <informations>
     <name>clkdomain_convert_1024x8</name>

-    <category ids="6"/>
+    <category ids="10"/>

     <description>
       <brief>This IP allows to pass 8 bits values from a clock domain to another. It uses a FIFO of 1024 entries.
 </brief>
     <description>
       <brief>This IP allows to pass 8 bits values from a clock domain to another. It uses a FIFO of 1024 entries.
 </brief>


@@ -18,11 +18,11 @@
       <input width="1" multiplicity="1" endian="little" type="boolean" name="clk_rd" purpose="clock"/>
       <input width="1" multiplicity="1" endian="little" type="boolean" name="clk_wr" purpose="clock"/>
       <input width="1" multiplicity="1" endian="little" type="boolean" name="reset" purpose="reset"/>
       <input width="1" multiplicity="1" endian="little" type="boolean" name="clk_rd" purpose="clock"/>
       <input width="1" multiplicity="1" endian="little" type="boolean" name="clk_wr" purpose="clock"/>
       <input width="1" multiplicity="1" endian="little" type="boolean" name="reset" purpose="reset"/>

-      <input width="8" multiplicity="1" endian="little" type="natural" name="data_in" purpose="data"/>
+      <input width="8" multiplicity="1" endian="little" type="natural" name="data_in" purpose="data" clock="clk_rd"/>

       <control iface="data_in"/>
     </inputs>
     <outputs>
       <control iface="data_in"/>
     </inputs>
     <outputs>

-      <output width="8" multiplicity="1" endian="little" type="natural" name="data_out" purpose="data"/>
+      <output width="8" multiplicity="1" endian="little" type="natural" name="data_out" purpose="data" clock="clk_wr"/>

       <control iface="data_out"/>
     </outputs>
   </interfaces>
       <control iface="data_out"/>
     </outputs>
   </interfaces>