started VHDL generation of GroupBlock

[blast.git] / lib / references / demux.xml

diff --git a/lib/references/demux.xml b/lib/references/demux.xml
index cd66442927cf03db83fec04dd35c08b7151849b5..88d07725788aeffb65b677d57165d7d6ee85be82 100644 (file)
--- a/lib/references/demux.xml
+++ b/lib/references/demux.xml
@@ -4,7 +4,7 @@
     <name>\r
       block demultiplexer\r
     </name>\r
-    <category ids="1,4" />  \r
+    <category ids="1,5" />  \r
     <description>\r
       <brief>\r
        This block demux an entry presented on FPGA pins over a variable number of outputs\r
@@ -25,7 +25,7 @@
       <input name="clk" type="boolean" width="1" purpose="clock" />\r
       <input name="rst" type="boolean" width="1" purpose="reset" />\r
       \r
-      <input name="val_i" type="expression" width="$val_width" level="top"/>\r
+      <input name="val_i" type="expression" width="$val_width" />\r
       <input name="sel_i" type="expression" width="$sel_width" />\r
     </inputs>\r
     <outputs>\r