\r
enum ParamType { Expression = 1, Character, String, Bit, BitVector, Boolean, Integer, Natural, Positive, Real, Time};\r
// a bit ugly to put that here but more practical for using them\r
+ /*!\r
+ * \brief The ParamWBAccess enum\r
+ * Read means that the block setup the value of this parameter and it is possible to \r
+ * to read that value from outside the FPGA (via the wrapper of the wishbone). Thus,\r
+ * from the block point of view, the parameter corresponds to an output port.\r
+ * Write means that it is possible to setup the value of this paramter from outside the FPGA (via\r
+ * the wrapper of the wishbone) so that the block can read that value. Thus,\r
+ * from the block point of view, the parameter corresponds to an input port.\r
+ */\r
enum ParamWBAccess { Read = 1, Write = 2};\r
enum ParamWBDuration { Permanent = 1, Trigger = 2 };\r
enum ParamVHDLContext { Entity = 1, Component = 2, Architecture = 3 }; // NB : 3 is when creating an instance of the block that owns this iface\r
