X-Git-Url: https://bilbo.iut-bm.univ-fcomte.fr/and/gitweb/blast.git/blobdiff_plain/015e6979cd7d336f6bbebfbdb7916af3ba23c096..3fb762e7042d9b4a1cf78556ad9ed7f117cc53ba:/FunctionalBlock.cpp diff --git a/FunctionalBlock.cpp b/FunctionalBlock.cpp index 1ec0c11..0fb38c3 100644 --- a/FunctionalBlock.cpp +++ b/FunctionalBlock.cpp @@ -8,7 +8,7 @@ #include "ArithmeticEvaluator.h" -FunctionalBlock::FunctionalBlock(GroupBlock *_parent, ReferenceBlock *_reference) throw(Exception) : AbstractBlock() { +FunctionalBlock::FunctionalBlock(GroupBlock *_parent, ReferenceBlock *_reference, bool createIfaces) throw(Exception) : AbstractBlock() { //if (! _reference->isReferenceBlock()) throw(Exception(BLOCK_INVALID_TYPE)); //if (! _group->isGroupBlock()) throw(Exception(BLOCK_INVALID_TYPE)); reference = _reference; @@ -30,6 +30,10 @@ FunctionalBlock::FunctionalBlock(GroupBlock *_parent, ReferenceBlock *_reference delta = -1; evaluator = NULL; + if (createIfaces) { + populate(); + } + } FunctionalBlock::~FunctionalBlock() { @@ -61,7 +65,7 @@ bool FunctionalBlock::isFunctionalBlock() { return true; } -bool FunctionalBlock::isSourceBlock() { +bool FunctionalBlock::isStimuliBlock() { if (parent == NULL) return true; return false; } @@ -96,7 +100,7 @@ void FunctionalBlock::populate() { addInterface(inter); /* WARNING FOR THE FUTURE : in case of there are several clock interfaces ofr that block - it would be a godd idea to make the user choose which one + it would be a good idea to make the user choose which one must be connected to defautl clk. Presently, the first encountered is chosen */ @@ -122,18 +126,6 @@ void FunctionalBlock::populate() { } } } - - // connect clk and rst to group clk/rst or to clkrstgen - if ((name != "clkrstgen") && (parent != NULL)) { - try { - connectClkReset(); - } - catch(Exception e) { - AbstractBlock* source = (AbstractBlock *)(e.getSource()); - cerr << qPrintable(source->getName()) << ":" << qPrintable(e.getMessage()) << endl; - throw(e); - } - } } QString FunctionalBlock::getReferenceXmlFile() { @@ -154,7 +146,7 @@ void FunctionalBlock::createPatterns() throw(Exception) { cout << "create patterns for block " << qPrintable(name) << endl; if (evaluator == NULL) evaluator = new ArithmeticEvaluator(); - if (! isGeneratorBlock()) { + if (! isSourceBlock()) { try { createDelta(); createConsumptionPattern(); @@ -441,12 +433,17 @@ QList FunctionalBlock::expandPatternRecur(const QString& patternIn, int *o catch(Exception e) { throw(e); } + if (repeat == 0) { + // remove the last + patternOut.removeLast(); + } + else { // repeat just the last value in currentGroup - char last = patternOut.last(); - //cout << "repeat last char " << repeat << " times : " << (int)last << endl; - - for(int i=1;i<(int)repeat;i++) { - patternOut.append(last); + char last = patternOut.last(); + //cout << "repeat last char " << repeat << " times : " << (int)last << endl; + for(int i=1;i<(int)repeat;i++) { + patternOut.append(last); + } } } *offset += 1; @@ -470,15 +467,21 @@ QList FunctionalBlock::expandPatternRecur(const QString& patternIn, int *o catch(Exception e) { throw(e); } - /* + if (repeat == 0) { + QList voidList; + return voidList; + } + else { + /* cout << "repeat last group " << repeat << " times : "; foreach (char c, currentGroup) cout <<(int)c; - cout << endl; + cout << endl; */ - QList single = patternOut; - for(int i=1;i<(int)repeat;i++) { - patternOut.append(single); - } + QList single = patternOut; + for(int i=1;i<(int)repeat;i++) { + patternOut.append(single); + } + } } return patternOut; } @@ -843,125 +846,113 @@ void FunctionalBlock::computeOutputPattern(int nbExec) throw(Exception) { clearOutputPattern(); - /* case 1: the block is a generator for which output pattern - must be computed for a nbExec following executions - */ + if (specialType != NotSpecial) { + cerr << "Abnormal case: the block is special and output pattern is computed normally" << endl; + throw(Exception(INVALID_FUNBLOCK_USE,this)); + } - if (nbExec > 0) { - cout << "computing output pattern of " << qPrintable(name) << " for " << nbExec << " executions" << endl; - foreach(AbstractInterface* iface, getControlOutputs()) { - FunctionalInterface* connIface = AI_TO_FUN(iface); - // create output pattern - QList* pp = productionPattern.value(connIface); - QList* pattern = new QList(*pp); - for(int i=1;iappend(*pp); - // assign pattern to interface - connIface->setOutputPattern(pattern); - // store it in QMap - outputPattern.insert(connIface,pattern); + cout << "computing output pattern of " << qPrintable(name) << endl; + + // in case of inputPattern not created, do it + if (lengthIP <= 0) { + + cout << "Strange case: input pattern is not created while it is time to compute output pattern !" << endl; + // collect the input patterns for each input + try { + createInputPattern(); + } + catch(Exception e) { + throw(e); } + cout << "input pattern array initialized with min. len " << lengthIP << endl; } - else { - cout << "computing output pattern of " << qPrintable(name) << endl; - - // in case of inputPattern not created, do it - if (lengthIP <= 0) { - cout << "Strange case: input pattern is not created while it is time to compute output pattern !" << endl; - // collect the input patterns for each input - try { - createInputPattern(); - } - catch(Exception e) { - throw(e); + // initialize the output pattern + lengthOP = 0; + foreach(AbstractInterface* iface, getControlOutputs()) { + FunctionalInterface* connIface = AI_TO_FUN(iface); + lengthOP = lengthIP+productionPattern.value(connIface)->size(); + QList* pattern = new QList(); + for(int i=0;iappend(0); + connIface->setOutputPattern(pattern); + outputPattern.insert(connIface,pattern); + } + cout << "output pattern array initialized" << endl; + + int clock = 0; + nbExec = 0; + // search for the beginning of the first execution. + while ((clock < lengthIP) && (! isValidDataGroup(inputPattern,clock))) clock++; + cout << "found 1st exec clock: " << clock << endl; + + while (clock < lengthIP) { + // initialize counters for current execution. + int p = 0; // index in production pattern + int o = 0; // clock+o will give the clock cycle of each output group + int cip = 0; // clock+cip give the clock cycle of an input group + int ccp = 0; // ccp give a column in the consumptio pattern + int nip = 0; // number of input data groups already consumed during the current execution, used while exploring IP + int ncp = 0; // number of input data groups already consumed during the current execution, used while exploring CP + bool cannotCompleteExec = false; + for(int m=0;msize(); - QList* pattern = new QList(); - for(int i=0;iappend(0); - connIface->setOutputPattern(pattern); - outputPattern.insert(connIface,pattern); - } - cout << "output pattern array initialized" << endl; - - int clock = 0; - nbExec = 0; - // search for the beginning of the first execution. - while ((clock < lengthIP) && (! isValidDataGroup(inputPattern,clock))) clock++; - cout << "found 1st exec clock: " << clock << endl; - - while (clock < lengthIP) { - // initialize counters for current execution. - int p = 0; // index in production pattern - int o = 0; // clock+o will give the clock cycle of each output group - int cip = 0; // clock+cip give the clock cycle of an input group - int ccp = 0; // ccp give a column in the consumptio pattern - int nip = 0; // number of input data groups already consumed during the current execution, used while exploring IP - int ncp = 0; // number of input data groups already consumed during the current execution, used while exploring CP - bool cannotCompleteExec = false; - for(int m=0;m FunctionalBlock::getExternalResources() { + + BlockImplementation* impl = reference->getImplementations().at(0); // for now only take first impl available + QList list = impl->getResources(); + foreach(QString s, list) { + cout << qPrintable(s) << " "; + } + cout << endl; + + return list; +} + + void FunctionalBlock::generateVHDL(const QString& path) throw(Exception){ - BlockImplementation* impl = reference->getImplementations().at(0); // for now only take first impl available + BlockImplementation* impl = reference->getImplementations().at(0); // for now only take first impl available + QFile implFile(impl->getXmlFile()); // reading in into QDomDocument @@ -1407,23 +1412,22 @@ void FunctionalBlock::generateComments(QTextStream& out, QDomElement &elt, QStri QString mail = eltAuthor.attribute("mail",""); out << "-- Author(s) : "<getDescription() << endl; out << "--" << endl; - QDomElement eltNote = eltDesc.nextSiblingElement("description"); + QDomElement eltNote = eltLog.nextSiblingElement("notes"); QDomElement note = eltNote.firstChildElement(); QString noteTxt = note.text(); - out << "-- Note :\n"< listParams = reference->getParameters(); QList listInputs = getInputs(); QList listOutputs = getOutputs(); - QList listBidirs = getBidirs(); - QString typePort, namePort; - - out << "entity " << name << " is" << endl; - - - /* TODO : rewrite the generation to take into acocunt the new object hierarchy */ + QList listBidirs = getBidirs(); // Generation of the generics QList listGenerics = getGenericParameters(); if ((!listGenerics.isEmpty()) || (hasController)) { - out << " generic (" << endl; + out << indent << " generic (" << endl; if (hasController) { - out << " wb_data_width : integer = 16;" << endl; - out << " wb_addr_width : integer = 12"; - if (!listGenerics.isEmpty()) out << ";"; + out << indent << " wb_data_width : integer = 16;" << endl; + out << indent << " wb_addr_width : integer = 12"; + if (!listGenerics.isEmpty()) out << indent << ";"; out << endl; } for(i=0;itoVHDL(BlockParameter::Entity, 0) << endl; + out << indent << " " << listGenerics.at(i)->toVHDL(BlockParameter::Entity, 0) << endl; } - out << " " << listGenerics.at(i)->toVHDL(BlockParameter::Entity,BlockParameter::NoComma) << endl; + out << indent << " " << listGenerics.at(i)->toVHDL(BlockParameter::Entity,BlockParameter::NoComma) << endl; - out << " );" << endl; + out << indent << " );" << endl; } - out << " port (" << endl; + out << indent << " port (" << endl; + + QString ports = ""; + QTextStream outPorts(&ports); // Generation of the clk & rst signals - out << " -- clk/rst" << endl; + outPorts << indent << " -- clk/rst" << endl; foreach(AbstractInterface* iface, listInputs) { if(iface->getPurpose() == AbstractInterface::Clock || iface->getPurpose() == AbstractInterface::Reset) { - out << " " << iface->getName() << " : in std_logic;" << endl; + outPorts << indent << " " << iface->getName() << " : in std_logic;" << endl; + } + } + foreach(AbstractInterface* iface, listOutputs) { + if(iface->getPurpose() == AbstractInterface::Clock || iface->getPurpose() == AbstractInterface::Reset) { + outPorts << indent << " " << iface->getName() << " : out std_logic;" << endl; } } if (hasController) { // Generation of the wishbone signals - out << " -- registers r/w via wishbone" << endl; + outPorts << indent << " -- registers r/w via wishbone" << endl; QList listWB = reference->getWishboneParameters(); for(i=0;itoVHDL(BlockParameter::Entity, 0) << endl; + outPorts << indent << " " << listWB.at(i)->toVHDL(BlockParameter::Entity, 0) << endl; } - out << " " << listWB.at(i)->toVHDL(BlockParameter::Entity,BlockParameter::NoComma) << endl; + outPorts << indent << " " << listWB.at(i)->toVHDL(BlockParameter::Entity,BlockParameter::NoComma) << endl; } - - int count = 0; - foreach(AbstractInterface* iface, getInterfaces()) { - if((iface->getPurpose() == AbstractInterface::Data)||(iface->getPurpose() == AbstractInterface::Control)) count++; - } // Generation of the data/control signals - int flag = 0; - bool first = true; - - foreach(AbstractInterface* iface, listInputs) { - if(iface->getPurpose() == AbstractInterface::Data) { - if (first) { - out << " -- input data ports" << endl; - first = false; - } - count--; - if (count == 0) flag = AbstractInterface::NoComma; - out << " " << iface->toVHDL(AbstractInterface::Entity, flag) << endl; + QList listIface = getInterfaces(AbstractInterface::Input, AbstractInterface::Data); + if (listIface.size()>0) { + outPorts << indent << " -- input data ports" << endl; + foreach(AbstractInterface* iface, listIface) { + outPorts << indent << " " << iface->toVHDL(AbstractInterface::Entity, 0) << endl; } } - first = true; - foreach(AbstractInterface* iface, listInputs) { - if(iface->getPurpose() == AbstractInterface::Control) { - if (first) { - out << " -- input control ports" << endl; - first = false; - } - count--; - if (count == 0) flag = AbstractInterface::NoComma; - out << " " << iface->toVHDL(AbstractInterface::Entity, flag) << endl; + listIface = getInterfaces(AbstractInterface::Input, AbstractInterface::Control); + if (listIface.size()>0) { + outPorts << indent << " -- input control ports" << endl; + foreach(AbstractInterface* iface, listIface) { + outPorts << indent << " " << iface->toVHDL(AbstractInterface::Entity, 0) << endl; } } - first = true; - foreach(AbstractInterface* iface, listOutputs) { - if(iface->getPurpose() == AbstractInterface::Data) { - if (first) { - out << " -- output data ports" << endl; - first = false; - } - count--; - if (count == 0) flag = AbstractInterface::NoComma; - out << " " << iface->toVHDL(AbstractInterface::Entity, flag) << endl; + listIface = getInterfaces(AbstractInterface::Output, AbstractInterface::Data); + if (listIface.size()>0) { + outPorts << indent << " -- output data ports" << endl; + foreach(AbstractInterface* iface, listIface) { + outPorts << indent << " " << iface->toVHDL(AbstractInterface::Entity, 0) << endl; } } - first = true; - foreach(AbstractInterface* iface, listOutputs) { - if(iface->getPurpose() == AbstractInterface::Control) { - if (first) { - out << " -- output control ports" << endl; - first = false; - } - count--; - if (count == 0) flag = AbstractInterface::NoComma; - out << " " << iface->toVHDL(AbstractInterface::Entity, flag) << endl; + listIface = getInterfaces(AbstractInterface::Output, AbstractInterface::Control); + if (listIface.size()>0) { + outPorts << indent << " -- output control ports" << endl; + foreach(AbstractInterface* iface, listIface) { + outPorts << indent << " " << iface->toVHDL(AbstractInterface::Entity, 0) << endl; } } - first = true; - foreach(AbstractInterface* iface, listBidirs) { - if(iface->getPurpose() == AbstractInterface::Data) { - if (first) { - out << " -- bidirs data ports" << endl; - first = false; - } - count--; - if (count == 0) flag = AbstractInterface::NoComma; - out << " " << iface->toVHDL(AbstractInterface::Entity, flag) << endl; + listIface = getInterfaces(AbstractInterface::InOut, AbstractInterface::Data); + if (listIface.size()>0) { + outPorts << indent << " -- bidirs data ports" << endl; + foreach(AbstractInterface* iface, listIface) { + outPorts << indent << " " << iface->toVHDL(AbstractInterface::Entity, 0) << endl; } } - out << " );" << endl << endl; - out << "end " << name << ";" << endl << endl; + + ports.chop(2); + ports += "\n"; + out << ports; + out << indent << " );" << endl << endl; + } void FunctionalBlock::generateArchitecture(QTextStream& out, QDomElement &elt ) throw(Exception) { + QRegularExpression rxPort("@\\{([a-zA-Z0-9_]+)\\}"); QString expr; QString code = elt.text(); - cout << qPrintable(code) << endl; + //cout << qPrintable(code) << endl; out << "architecture rtl of " << name << " is" << endl; QStringList listLine = code.split("\n"); @@ -1606,12 +1590,72 @@ void FunctionalBlock::generateArchitecture(QTextStream& out, QDomElement &elt ) } */ if(line.contains("@{")) { - out << line << endl; + QMap modifs; + //cout << qPrintable(line) << endl; + QRegularExpressionMatchIterator matchPort = rxPort.globalMatch(line); + while(matchPort.hasNext()) { + QRegularExpressionMatch m = matchPort.next(); + QString refName = m.captured(1); + AbstractInterface* refIface = reference->getIfaceFromName(refName); + QString funName = getIfaceUserName(refIface); + if (!funName.isEmpty()) { + modifs.insert(m.captured(0),funName); + //cout << "replace " << qPrintable(refIface->getName()) << " by " << qPrintable(funIface->getName()) << endl; + } + } + QMapIterator iterM(modifs); + while(iterM.hasNext()) { + iterM.next(); + QString oldName = iterM.key(); + QString newName = iterM.value(); + line.replace(oldName,newName); + } } + out << line << endl; } + + out << "end rtl;" << endl; } void FunctionalBlock::generateController(QTextStream &out) throw(Exception) { } +QString FunctionalBlock::getIfaceUserName(AbstractInterface* refIface) { + + if (! refIface->isReferenceInterface()) return ""; + + AbstractInterface* funcIface = NULL; + + if (refIface->getDirection() == AbstractInterface::Input) { + foreach(AbstractInterface* iface, getInputs()) { + FunctionalInterface* fi = AI_TO_FUN(iface); + if (fi->getReference() == refIface) { + funcIface = iface; + break; + } + } + } + else if (refIface->getDirection() == AbstractInterface::Output) { + foreach(AbstractInterface* iface, getOutputs()) { + FunctionalInterface* fi = AI_TO_FUN(iface); + if (fi->getReference() == refIface) { + funcIface = iface; + break; + } + } + } + else if (refIface->getDirection() == AbstractInterface::InOut) { + foreach(AbstractInterface* iface, getBidirs()) { + FunctionalInterface* fi = AI_TO_FUN(iface); + if (fi->getReference() == refIface) { + funcIface = iface; + break; + } + } + } + if (funcIface == NULL) return ""; + + return funcIface->getName(); +} +