X-Git-Url: https://bilbo.iut-bm.univ-fcomte.fr/and/gitweb/blast.git/blobdiff_plain/48f48e6a26a54751ecd0ab90b10ab972cc5e89cd..18fecf25efe710631fabecbb9f689c2997fdfe18:/BlockImplementation.cpp

diff --git a/BlockImplementation.cpp b/BlockImplementation.cpp
index b751021..5ae6eda 100644
--- a/BlockImplementation.cpp
+++ b/BlockImplementation.cpp
@@ -73,286 +73,35 @@ void BlockImplementation::loadPatterns(QDomElement& root) throw(Exception) {
 }
 
 bool BlockImplementation::checkPatterns() {
-  if (reference == NULL) return false;
+
+
+  if (reference == NULL) {
+    cout << "no ref. while checking patterns of implementation " << endl;
+    return false;
+  }
   
   AbstractInterface* iface;  
   QHashIterator<QString,QString> iterI(consumptionPattern);
   while (iterI.hasNext()) {
     iterI.next();
     iface = reference->getIfaceFromName(iterI.key());
-    if (iface == NULL) return false;
+    if (iface == NULL) {
+      cout << "cannot found an input  ref. iface for impl. iface " << qPrintable(iterI.key()) << endl;
+      return false;
+    }
   }
   QHashIterator<QString,QString> iterO(productionPattern);
   while (iterO.hasNext()) {
     iterO.next();
     iface = reference->getIfaceFromName(iterO.key());
-    if (iface == NULL) return false;
+    if (iface == NULL) {
+      cout << "cannot found an output  ref. iface for impl. iface " << qPrintable(iterI.key()) << endl;
+      return false;
+    }
   }  
   return true;  
 }
 
-void BlockImplementation::generateVHDL(FunctionalBlock* _block, const QString &path) throw(Exception) {
-
-  block = _block;
-
-  QFile implFile(xmlFile);
-
-  // reading in into QDomDocument
-  QDomDocument document("implFile");
-
-  if (!implFile.open(QIODevice::ReadOnly)) {
-    throw(Exception(IMPLFILE_NOACCESS));
-  }
-  if (!document.setContent(&implFile)) {
-    implFile.close();
-    throw(Exception(IMPLFILE_NOACCESS));
-  }
-  implFile.close();
-
-  bool genController = false;
-  QString coreFile = "";
-  QString controllerFile = "";
-
-  if (reference->isWBConfigurable()) {
-    genController = true;
-    controllerFile = path;
-    controllerFile.append(block->getName());
-    controllerFile.append("_ctrl.vhd");    
-  }
-  else {
-    controllerFile = "nofile.vhd";    
-  }
-  coreFile = path;
-  coreFile.append(block->getName());
-  coreFile.append(".vhd");
-
-  QFile vhdlCore(coreFile);
-  QFile vhdlController(controllerFile);
-
-  if (!vhdlCore.open(QIODevice::WriteOnly)) {
-    throw(Exception(VHDLFILE_NOACCESS));
-  }
-
-  if (genController) {
-    if (!vhdlController.open(QIODevice::WriteOnly)) {
-      throw(Exception(VHDLFILE_NOACCESS));
-    }
-  }
-  QTextStream outCore(&vhdlCore);
-  QTextStream outController;
-  if (genController) {
-    outController.setDevice(&vhdlController);
-  }
-
-  try {
-
-
-    //Get the root element
-    QDomElement impl = document.documentElement();
-    QDomElement eltComments = impl.firstChildElement("comments");
-    generateComments(eltComments, coreFile, outCore);
-    QDomElement eltLibs = eltComments.nextSiblingElement("libraries");
-    generateLibraries(eltLibs, outCore);
-    generateEntity(outCore, genController);
-    QDomElement eltArch = eltLibs.nextSiblingElement("architecture");
-    generateArchitecture(eltArch, outCore);
-    if (genController) {
-      generateController(outController);
-    }
-  }
-  catch(Exception err) {
-    throw(err);
-  }
-
-  vhdlCore.close();
-  vhdlController.close();
-}
-
-// This function generates the comments part of the VHDL document
-void BlockImplementation::generateComments(QDomElement &elt, QString coreFile, QTextStream& out) throw(Exception) {
-
-  for(int i = 0; i < 50; i++) {
-    out << "--";
-  }
-  out << "\n--\n";
-  QString fileName = coreFile;
-  out << "--  File        : " << fileName << "\n";
-  out << "--\n";
-  QDomElement eltAuthor = elt.firstChildElement("author");
-  QString firstName = eltAuthor.attribute("firstname","");
-  QString lastName = eltAuthor.attribute("lastname","");
-  QString mail = eltAuthor.attribute("mail","");
-  out << "--  Author(s)   : "<<firstName+" "<<lastName<<" ("<<mail<<")\n";
-  out << "--\n";
-  QDomElement eltDate = eltAuthor.nextSiblingElement("date");
-  QString crea = eltDate.attribute("creation","");
-  out << "--  Creation Date   : "<<crea<<"\n";
-  out << "--\n";
-  QDomElement eltRelated = eltDate.nextSiblingElement("related_files");
-  QString relateds = eltRelated.attribute("list","");
-  out << "--  Related files   :\n"<<relateds<<"\n";
-  out << "--\n";
-  QDomElement eltDesc = eltRelated.nextSiblingElement("description");
-  QDomElement desc = eltDesc.firstChildElement();
-  QString descTxt = desc.text();
-  out << "--  Decription      :\n"<<descTxt<<"\n";
-  out << "--\n";
-  QDomElement eltNote = eltDesc.nextSiblingElement("description");
-  QDomElement note = eltNote.firstChildElement();
-  QString noteTxt = note.text();
-  out << "--  Note          :\n"<<noteTxt<<"\n";
-  out << "--\n";
-  for(int i = 0; i < 50; i++) {
-    out << "--";
-  }
-  out << "\n\n";
-}
-
-// This function generates the library part of the VHDL document
-void BlockImplementation::generateLibraries(QDomElement &elt, QTextStream& out) throw(Exception) {
-
-  QDomNodeList listLib = elt.elementsByTagName("library");
-  for(int i = 0; i < listLib.length(); i++) {
-    QDomNode nodeLib = listLib.item(i);
-    QDomElement eltLib = nodeLib.toElement();
-    QString nameLib = eltLib.attribute("name", "");
-    out << "library " << nameLib << ";\n";
-    QDomNodeList listPack = eltLib.elementsByTagName("package");
-    for(int j = 0; j < listPack.length(); j++) {
-      QDomNode nodePack = listPack.item(j);
-      QDomElement eltPack = nodePack.toElement();
-      QString namePack = eltPack.attribute("name", "");
-      QString usePack = elt.attribute("use","");
-      out << "use " << nameLib << "." << namePack << "." << usePack << ";\n";
-    }
-    out << "\n";
-  }
-}
-
-// This function generates the entity part of the VHDL document
-void BlockImplementation::generateEntity(QTextStream& out, bool hasController) throw(Exception) {
-
-  int i=0;
-  nameEnt = reference->getName();
-  //QList<BlockParameter*> listParams = reference->getParameters();
-  QList<AbstractInterface*> listInputs = reference->getInputs();
-  QList<AbstractInterface*> listOutputs = reference->getOutputs();
-  QList<AbstractInterface*> listBidirs = reference->getBidirs();
-  QString typePort, namePort;
-
-  out << "entity " << nameEnt << " is\n";
-
-
-  /* TODO : rewrite the generation to take into acocunt the new object hierarchy */
-
-  // Generation of the generics
-  QList<BlockParameter*> listGenerics = reference->getGenericParameters();
-  if ((!listGenerics.isEmpty()) || (hasController)) {
-    out << "  generic (" << endl;
-    if (hasController) {
-      out << "    wb_data_width : integer = 16;" << endl;
-      out << "    wb_addr_width : integer = 12";
-      if (!listGenerics.isEmpty()) out << ";";
-      out << endl;
-    }
-    for(i=0;i<listGenerics.size()-1;i++) {
-      out << "    " << listGenerics.at(i)->toVHDL(BlockParameter::Entity, 0);
-    }
-    out << "    " << listGenerics.at(i)->toVHDL(BlockParameter::Entity,BlockParameter::NoComma);
-
-    out << "    );" << endl;
-  }
-
-  out << "  port (" << endl;
-
-  // Generation of the clk & rst signals
-  out << "    -- clk/rst" << endl;
-  for(int i = 0; i < listInputs.size(); i++) {
-    if(listInputs.at(i)->getPurpose() == AbstractInterface::Clock || listInputs.at(i)->getPurpose() == AbstractInterface::Reset) {
-      out << "    " << listInputs.at(i)->getName() << " : in std_logic;" << endl;
-    }
-  }
-
-  if (hasController) {
-    // Generation of the wishbone signals
-    out << "    -- registers r/w via wishbone" << endl;
-    QList<BlockParameter*> listWB = reference->getWishboneParameters();
-    for(i=0;i<listWB.size()-1;i++) {
-      out << "    " << listWB.at(i)->toVHDL(BlockParameter::Entity, 0);
-    }
-    out << "    " << listWB.at(i)->toVHDL(BlockParameter::Entity,BlockParameter::NoComma);
-  }
-
-
-  // Generation of the data signals
-  out << "-- data ports\n";
-  for(int i = 0; i < listInputs.size(); i++) {
-    namePort = getIfaceUserName(reference->AbstractBlock::getIfaceFromName(listInputs.at(i)->getName()));
-    if(listInputs.at(i)->getWidth().compare("1"))
-      typePort = "std_logic";
-    else
-      typePort = calculateWidth(listInputs.at(i)->getWidth());
-    if(listInputs.at(i)->getPurpose() == 1)
-      out << namePort << " : in std_logic_vector(" << typePort << " -1 downto 0) ;\n";
-  }
-
-  for(int i = 0; i < listOutputs.size(); i++) {
-    namePort = getIfaceUserName(reference->AbstractBlock::getIfaceFromName(listOutputs.at(i)->getName()));
-    if(listOutputs.at(i)->getWidth().compare("1"))
-      typePort = "std_logic";
-    else
-      typePort = calculateWidth(listOutputs.at(i)->getWidth());
-    if(listOutputs.at(i)->getPurpose() == 1)
-      out << namePort << " : out std_logic_vector(" << typePort << " -1 downto 0) ;\n";
-  }
-
-  for(int i = 0; i < listBidirs.size(); i++) {
-    namePort = getIfaceUserName(reference->AbstractBlock::getIfaceFromName(listBidirs.at(i)->getName()));
-    if(listBidirs.at(i)->getWidth().compare(("1")))
-      typePort = "std_logic";
-    else
-      typePort = calculateWidth((listBidirs.at(i)->getWidth()));
-    if(listBidirs.at(i)->getPurpose() == 1)
-      out << namePort << " : inout std_logic_vector(" << typePort << " -1 downto 0) ;\n";
-  }
-}
-
-// This function generates the architecture part of the VHDL document
-void BlockImplementation::generateArchitecture(QDomElement &elt, QTextStream& out) throw(Exception) {
-
-  QString expr;
-  QDomElement eltArch = elt.nextSiblingElement("architecture");
-  out << "architecture " << nameEnt <<"_1 of " << nameEnt << "is\n";
-  QString implText = eltArch.text();
-  QStringList listLine = implText.split("\n");
-  for(int i =0; i < listLine.size(); i++) {
-    if(listLine.at(i).contains(QRegularExpression("@foreach{")) != -1) {
-      while(listLine.at(i).compare("@endforeach") != -1) {
-        expr = expr + listLine.at(i) + '\n';
-        i++;
-      }
-      expr = expr + listLine.at(i);
-      out << evalComplex(expr, 1) << '\n';
-    }
-    if(listLine.at(i).contains(QRegularExpression("@caseeach{")) != -1) {
-      while(listLine.at(i).compare("@endcaseeach") != -1) {
-        expr = expr + listLine.at(i) + '\n';
-        i++;
-      }
-      expr = expr + listLine.at(i);
-      out << evalComplex(expr, 2) << '\n';
-    }
-
-    if(listLine.at(i).contains('@') == -1)
-      out << listLine.at(i) << "\n";
-    else
-      out << eval(listLine.at(i), out) << "\n";
-  }
-}
-
-void BlockImplementation::generateController(QTextStream &out) throw(Exception) {
-}
-
 QString BlockImplementation::eval(QString line, QTextStream& out) {
   QString res, s, begLine, endLine, expr;
   evaluator->setExpression(line);