X-Git-Url: https://bilbo.iut-bm.univ-fcomte.fr/and/gitweb/blast.git/blobdiff_plain/48f48e6a26a54751ecd0ab90b10ab972cc5e89cd..8fb3c55ee009a11db5e1c08a4cfb286979412745:/AbstractInterface.h?ds=inline

diff --git a/AbstractInterface.h b/AbstractInterface.h
index 2c914d4..95ad4bb 100644
--- a/AbstractInterface.h
+++ b/AbstractInterface.h
@@ -25,16 +25,18 @@ class AbstractInterface {
 public :
 
   enum IfaceWidthType { Expression = 1, Boolean, Natural, Inherited}; //! Inherited is only for Group interface 
+  enum IfaceWidthDir { LittleEndian = 1, BigEndian}; //! LittleEndian = X downto 0, BigEndian = 0 to X
   enum IfacePurpose { AnyPurpose = 0, Data = 1, Control, Clock, Reset, Wishbone };
   enum IfaceDirection { AnyDirection = 0, Input = 1, Output = 2, InOut = 3 };  
-  enum IfaceVHDLContext {AnyContext = 0, Entity = 1, Component = 2, Architecture = 3 }; // NB : 3 is when creating an instance of the block that owns this iface
+  enum IfaceVHDLContext {AnyContext = 0, Entity = 1, Component = 2, Instance = 3, Signal = 4 };
   enum IfaceVHDLFlags { NoComma = 1 };
+  enum IfaceClockName { NoName = 0, ClockName, ParameterName };
 
   static int getIntDirection(QString str);
   static int getIntPurpose(QString str);
 
   AbstractInterface(AbstractBlock* _owner);
-  AbstractInterface(AbstractBlock* _owner, const QString& _name, const QString& _type, const QString& _width, int _direction, int _purpose);
+  AbstractInterface(AbstractBlock* _owner, const QString& _name, int _direction, int _purpose, const QString& _type, const QString& _width, int _endianess = LittleEndian);
   AbstractInterface(AbstractInterface* other);
   virtual ~AbstractInterface();
 
@@ -42,26 +44,35 @@ public :
   inline QString getName() { return name;}
   inline int getType() { return type; }
   QString getTypeString();
-  inline QString getWidth() { return width;}
+  inline int getEndianess() { return endianess; }
+  QString getEndianessString();
+  inline QString getWidthString() { return width;}
+  virtual int getWidth(); // return -1 if size cannot be determine
   inline int getPurpose() { return purpose;}
   QString getPurposeString();
   inline int getDirection() { return direction;}
   QString getDirectionString();  
   inline AbstractBlock *getOwner() { return owner;}
   inline AbstractInterface* getAssociatedIface() { return associatedIface; }
+  inline QString getClockIfaceString() { return clkIface; }
+  inline int getClockIfaceType() { return clkIfaceType; }
+  AbstractInterface* getClockIface();
+
 
   double getDoubleWidth() throw(QException);
   
 
   // setters
   inline void setOwner(AbstractBlock* _owner) { owner = _owner; }
-  inline void setName(const QString& _name) { name = _name; }
+  void setName(const QString& _name);
   inline void setWidth(const QString& _width) { width = _width; }
   inline void setType(int _type) { type = _type;}
+  inline void setEndianess(int _endianess) { endianess = _endianess;}
   inline void setType(const QString& _type) { type = typeFromString(_type);}
   void setPurpose(int _purpose);
   void setDirection(int _direction);
   bool setAssociatedIface(AbstractInterface* iface);
+  bool setClockIface(QString name);
   
   // testers
   virtual bool isReferenceInterface();
@@ -73,14 +84,16 @@ public :
   
   int typeFromString(const QString &_type);
 
-  QString toVHDL(int context, int flags) throw(Exception);
+  QString toVHDL(IfaceVHDLContext context, int flags) throw(Exception);
 
 protected:
   QString name;
-  int type;
-  QString width;
   int purpose;
   int direction;
+  int type;
+  QString width;
+  int endianess;
+
 
   AbstractBlock* owner;
   /*!
@@ -92,6 +105,17 @@ protected:
    * (NB: a test is done in the method to prevent the other case).
    */
   AbstractInterface* associatedIface;
+  /*!
+   * \brief clkIface represents the clock interface that is used in processes modifying this interface. It is only relevant for
+   * Data interfaces and clock outputs (that comes from a clkrstgen). Since Control interfaces are automatically associated to a
+   * Data interface, clkIface is "" for them. Wishbone interfaces
+   * In general, blocks have a single
+   * clock interface which is by default automatically connected to the main clock dispatched by the clkrstgen block in top group.
+   * Nevertheless, the designer has the possibility to connect the block taht owns this interface to another clkrstgen block.  Moreover,
+   * some blocks may have several clocks, e.g. dual port RAMs, FIFOs.
+   */
+  QString clkIface;
+  int clkIfaceType; // 0 for not affected, 1 for clock input name, 2 for user param name
   
   
 };