X-Git-Url: https://bilbo.iut-bm.univ-fcomte.fr/and/gitweb/blast.git/blobdiff_plain/56f7c4239666506c59af42885f0bf0141d21a614..2bdaa0aa3fab52f0808f60d9bbdabcd56d0efae9:/AbstractInterface.h diff --git a/AbstractInterface.h b/AbstractInterface.h index b318f92..95ad4bb 100644 --- a/AbstractInterface.h +++ b/AbstractInterface.h @@ -28,8 +28,9 @@ public : enum IfaceWidthDir { LittleEndian = 1, BigEndian}; //! LittleEndian = X downto 0, BigEndian = 0 to X enum IfacePurpose { AnyPurpose = 0, Data = 1, Control, Clock, Reset, Wishbone }; enum IfaceDirection { AnyDirection = 0, Input = 1, Output = 2, InOut = 3 }; - enum IfaceVHDLContext {AnyContext = 0, Entity = 1, Component = 2, Architecture = 3 }; // NB : 3 is when creating an instance of the block that owns this iface + enum IfaceVHDLContext {AnyContext = 0, Entity = 1, Component = 2, Instance = 3, Signal = 4 }; enum IfaceVHDLFlags { NoComma = 1 }; + enum IfaceClockName { NoName = 0, ClockName, ParameterName }; static int getIntDirection(QString str); static int getIntPurpose(QString str); @@ -45,20 +46,25 @@ public : QString getTypeString(); inline int getEndianess() { return endianess; } QString getEndianessString(); - inline QString getWidth() { return width;} + inline QString getWidthString() { return width;} + virtual int getWidth(); // return -1 if size cannot be determine inline int getPurpose() { return purpose;} QString getPurposeString(); inline int getDirection() { return direction;} QString getDirectionString(); inline AbstractBlock *getOwner() { return owner;} inline AbstractInterface* getAssociatedIface() { return associatedIface; } + inline QString getClockIfaceString() { return clkIface; } + inline int getClockIfaceType() { return clkIfaceType; } + AbstractInterface* getClockIface(); + double getDoubleWidth() throw(QException); // setters inline void setOwner(AbstractBlock* _owner) { owner = _owner; } - inline void setName(const QString& _name) { name = _name; } + void setName(const QString& _name); inline void setWidth(const QString& _width) { width = _width; } inline void setType(int _type) { type = _type;} inline void setEndianess(int _endianess) { endianess = _endianess;} @@ -66,6 +72,7 @@ public : void setPurpose(int _purpose); void setDirection(int _direction); bool setAssociatedIface(AbstractInterface* iface); + bool setClockIface(QString name); // testers virtual bool isReferenceInterface(); @@ -77,7 +84,7 @@ public : int typeFromString(const QString &_type); - QString toVHDL(int context, int flags) throw(Exception); + QString toVHDL(IfaceVHDLContext context, int flags) throw(Exception); protected: QString name; @@ -98,6 +105,17 @@ protected: * (NB: a test is done in the method to prevent the other case). */ AbstractInterface* associatedIface; + /*! + * \brief clkIface represents the clock interface that is used in processes modifying this interface. It is only relevant for + * Data interfaces and clock outputs (that comes from a clkrstgen). Since Control interfaces are automatically associated to a + * Data interface, clkIface is "" for them. Wishbone interfaces + * In general, blocks have a single + * clock interface which is by default automatically connected to the main clock dispatched by the clkrstgen block in top group. + * Nevertheless, the designer has the possibility to connect the block taht owns this interface to another clkrstgen block. Moreover, + * some blocks may have several clocks, e.g. dual port RAMs, FIFOs. + */ + QString clkIface; + int clkIfaceType; // 0 for not affected, 1 for clock input name, 2 for user param name };