X-Git-Url: https://bilbo.iut-bm.univ-fcomte.fr/and/gitweb/blast.git/blobdiff_plain/6e2b3026c6a496e81642c373796bd39dad33d2a6..HEAD:/AbstractBlock.h diff --git a/AbstractBlock.h b/AbstractBlock.h index 5f2acb5..f40af86 100644 --- a/AbstractBlock.h +++ b/AbstractBlock.h @@ -9,9 +9,11 @@ #include "AbstractInterface.h" class AbstractInterface; class BlockParameter; +class Graph; #define AB_TO_REF(ptr) ((ReferenceBlock*)ptr) #define AB_TO_FUN(ptr) ((FunctionalBlock*)ptr) +#define AB_TO_SPE(ptr) ((SpecialBlock*)ptr) #define AB_TO_GRP(ptr) ((GroupBlock*)ptr) using namespace std; @@ -22,45 +24,70 @@ class AbstractBlock { public: enum BlockVHDLContext {AnyContext = 0, Entity = 1, Component = 2, Architecture = 3 }; // NB : 3 is when creating an instance of the block that owns this iface + enum SpecialType { NotSpecial = 0, Source = 1, Sink = 2, ClkConvert = 3 }; - AbstractBlock(); + + AbstractBlock(Graph* _graph); //AbstractBlock(const QString& _name); virtual ~AbstractBlock(); // getters inline QString getName() { return name; } + inline int getSpecialType() { return specialType; } + inline QString getVersion() { return version; } inline int nbParameters() { return params.size(); } - inline QList getParameters() { return params; } + inline Graph* getGraph() { return graph; } + inline QList getInputs() { return inputs; } inline QList getOutputs() { return outputs; } inline QList getBidirs() { return bidirs; } + QList getInterfaces(int direction = AbstractInterface::AnyDirection, int purpose = AbstractInterface::AnyPurpose); + QList getDataInputs(); //! return all inputs of type data + QList getDataOutputs(); //! return all inputs of type data + QList getControlInputs(); //! return all inputs of type control + QList getControlOutputs(); //! return all outputs of type control + AbstractInterface* getIfaceFromName(QString name); + + inline QList getParameters() { return params; } + BlockParameter* getParameterFromName(QString name); QList getUserParameters(); QList getGenericParameters(); QList getPortParameters(); QList getWishboneParameters(); + inline AbstractBlock* getParent() { return parent; } - inline bool getPatternComputed() { return patternComputed; } + inline bool getOutputPatternComputed() { return outputPatternComputed; } inline int getTraversalLevel() { return traversalLevel; } // setters void setName(const QString& str); + void setSpecialType(int type); + inline void setVersion(const QString& _version) { version = _version; } virtual void setParent(AbstractBlock* _parent); - inline void setPatternComputed(bool state) { patternComputed = state; } + inline void setOutputPatternComputed(bool state) { outputPatternComputed = state; } inline void resetTraversalLevel() { traversalLevel = -1; } inline void setTraversalLevel(int level) { traversalLevel = level; } // testers virtual bool isReferenceBlock(); virtual bool isFunctionalBlock(); + virtual bool isSpecialBlock(); virtual bool isGroupBlock(); - virtual bool isSourceBlock(); //! a source block is outside the top group and simulates a peripheral (NB: this is also a generator) + virtual bool isStimuliBlock(); //! a stimuli block is outside the top group and simulates a peripheral (NB: this is also a source) virtual bool isTopGroupBlock(); - bool isGeneratorBlock(); //! a generator block has no data inputs and thus executes infinitely + bool isSourceBlock(); //! a source block is either a block that has no data inputs or that is of special type source. Thus it executes infinitely + bool isSinkBlock(); //! a sink block has no data outputs and just collects what it receives (i.e. no compatibility check) bool isWBConfigurable(); // others - void connectClkReset() throw(Exception); - + int getSpecialTypeFromString(QString str); + + /*! + * \brief connectClkReset connects the clock and reset inputs to a clkrstgen block or the the group ifaces + * \param idBlockClk is the id of the clock interface (there may be severals) + * \param idGen is the id of the clkrstgen block + */ + virtual QList getExternalResources() = 0; // returns the list of all external files needed for VHDL generation virtual void generateVHDL(const QString& path) throw(Exception) = 0; // main entry to generate the VHDL code void generateComponent(QTextStream& out, bool hasController=false) throw(Exception); // generate the component using reference void generateEntity(QTextStream& out, bool hasController=false) throw(Exception); // generate the entity using reference @@ -73,13 +100,6 @@ public: void removeAllInterfaces(); void defineBlockParam(BlockParameter *param); - QList getInterfaces(int direction = AbstractInterface::AnyDirection, int purpose = AbstractInterface::AnyPurpose); - QList getDataInputs(); //! return all inputs of type data - QList getDataOutputs(); //! return all inputs of type data - QList getControlInputs(); //! return all inputs of type control - QList getControlOutputs(); //! return all outputs of type control - AbstractInterface* getIfaceFromName(QString name); - BlockParameter* getParameterFromName(QString name); // patterns virtual void checkInputPatternCompatibility() throw(Exception) = 0; @@ -90,6 +110,9 @@ protected: QString name; + int specialType; + QString version; + Graph* graph; // parameters QList params; @@ -102,7 +125,7 @@ protected: // others // patterns - bool patternComputed; + bool outputPatternComputed; int traversalLevel; // the level (0, 1, ...) during the traversal of the graph // NB: only GroupBlock and FunctionalBlock have a real parent, except sources that have no parents