X-Git-Url: https://bilbo.iut-bm.univ-fcomte.fr/and/gitweb/blast.git/blobdiff_plain/6e2b3026c6a496e81642c373796bd39dad33d2a6..e40a5399ec7887c2606f18575c809b0d05b09278:/FunctionalBlock.cpp?ds=sidebyside

diff --git a/FunctionalBlock.cpp b/FunctionalBlock.cpp
index 3ea8253..ab9611d 100644
--- a/FunctionalBlock.cpp
+++ b/FunctionalBlock.cpp
@@ -8,7 +8,7 @@
 #include "ArithmeticEvaluator.h"
 
 
-FunctionalBlock::FunctionalBlock(GroupBlock *_parent, ReferenceBlock *_reference) throw(Exception) :  AbstractBlock() {
+FunctionalBlock::FunctionalBlock(GroupBlock *_parent, ReferenceBlock *_reference, bool createIfaces) throw(Exception) :  AbstractBlock() {
   //if (! _reference->isReferenceBlock()) throw(Exception(BLOCK_INVALID_TYPE));
   //if (! _group->isGroupBlock()) throw(Exception(BLOCK_INVALID_TYPE));
   reference = _reference;
@@ -30,6 +30,10 @@ FunctionalBlock::FunctionalBlock(GroupBlock *_parent, ReferenceBlock *_reference
   delta = -1;
   evaluator = NULL;
 
+  if (createIfaces) {
+    populate();
+  }
+
 }
 
 FunctionalBlock::~FunctionalBlock() {
@@ -96,7 +100,7 @@ void FunctionalBlock::populate() {
     addInterface(inter);
     /* WARNING FOR THE FUTURE :
        in case of there are several clock interfaces ofr that block
-       it would be a godd idea to make the user choose which one
+       it would be a good idea to make the user choose which one
        must be connected to defautl clk.
        Presently, the first encountered is chosen
      */
@@ -122,18 +126,6 @@ void FunctionalBlock::populate() {
       }       
     }
   }
-
-  // connect clk and rst to group clk/rst or to clkrstgen
-  if ((name != "clkrstgen") && (parent != NULL)) {
-    try {
-      connectClkReset();
-    }
-    catch(Exception e) {
-      AbstractBlock* source = (AbstractBlock *)(e.getSource());
-      cerr << qPrintable(source->getName()) << ":" << qPrintable(e.getMessage()) << endl;
-      throw(e);
-    }
-  }
 }
 
 QString FunctionalBlock::getReferenceXmlFile() {
@@ -441,12 +433,17 @@ QList<char> FunctionalBlock::expandPatternRecur(const QString& patternIn, int *o
       catch(Exception e) {
         throw(e);
       }
+      if (repeat == 0) {
+        // remove the last
+        patternOut.removeLast();
+      }
+      else {
       // repeat just the last value in currentGroup
-      char last = patternOut.last();
-      //cout << "repeat last char " << repeat << " times : " << (int)last << endl;
-      
-      for(int i=1;i<(int)repeat;i++) {
-        patternOut.append(last);
+        char last = patternOut.last();
+        //cout << "repeat last char " << repeat << " times : " << (int)last << endl;
+        for(int i=1;i<(int)repeat;i++) {
+          patternOut.append(last);
+        }
       }
     }    
     *offset += 1;
@@ -470,15 +467,21 @@ QList<char> FunctionalBlock::expandPatternRecur(const QString& patternIn, int *o
     catch(Exception e) {
       throw(e);
     }
-    /*
+    if (repeat == 0) {
+      QList<char> voidList;
+      return voidList;
+    }
+    else {
+      /*
     cout << "repeat last group " << repeat << " times : ";
     foreach (char c, currentGroup) cout <<(int)c;
-    cout << endl;  
+    cout << endl;
     */
-    QList<char> single = patternOut;
-    for(int i=1;i<(int)repeat;i++) {
-      patternOut.append(single);
-    }    
+      QList<char> single = patternOut;
+      for(int i=1;i<(int)repeat;i++) {
+        patternOut.append(single);
+      }
+    }
   }  
   return patternOut;
 }
@@ -1315,9 +1318,23 @@ int FunctionalBlock::createTriggers() {
   return triggers.size();
 }
 
+QList<QString> FunctionalBlock::getExternalResources() {
+
+  BlockImplementation* impl = reference->getImplementations().at(0); // for now only take first impl available
+  QList<QString> list = impl->getResources();
+  foreach(QString s, list) {
+    cout << qPrintable(s) << " ";
+  }
+  cout << endl;
+
+  return list;
+}
+
+
 void FunctionalBlock::generateVHDL(const QString& path) throw(Exception){
     
-  BlockImplementation* impl = reference->getImplementations().at(0); // for now only take first impl available
+  BlockImplementation* impl = reference->getImplementations().at(0); // for now only take first impl available  
+
   QFile implFile(impl->getXmlFile());
 
   // reading in into QDomDocument
@@ -1445,7 +1462,7 @@ void FunctionalBlock::generateLibraries(QTextStream& out, QDomElement &elt) thro
       QDomElement eltPack = nodePack.toElement();
       QString namePack = eltPack.attribute("name","none");
       QString usePack = eltPack.attribute("use","none");
-      out << "use " << nameLib << "." << namePack << "." << usePack << endl;
+      out << "use " << nameLib << "." << namePack << "." << usePack << ";" << endl;
     }
     out << endl;
   }
@@ -1485,106 +1502,82 @@ void FunctionalBlock::generateEntityOrComponentBody(QTextStream& out, int indent
 
   out << indent << "  port (" << endl;
 
+  QString ports = "";
+  QTextStream outPorts(&ports);
+
   // Generation of the clk & rst signals
-  out << indent << "    -- clk/rst" << endl;
+  outPorts << indent << "    -- clk/rst" << endl;
   foreach(AbstractInterface* iface, listInputs) {
     if(iface->getPurpose() == AbstractInterface::Clock || iface->getPurpose() == AbstractInterface::Reset) {
-      out << indent << "    " << iface->getName() << " : in std_logic;" << endl;
+      outPorts << indent << "    " << iface->getName() << " : in std_logic;" << endl;
     }
   }
   foreach(AbstractInterface* iface, listOutputs) {
     if(iface->getPurpose() == AbstractInterface::Clock || iface->getPurpose() == AbstractInterface::Reset) {
-      out << indent << "    " << iface->getName() << " : out std_logic;" << endl;
+      outPorts << indent << "    " << iface->getName() << " : out std_logic;" << endl;
     }
   }
 
   if (hasController) {
     // Generation of the wishbone signals
-    out << indent << "    -- registers r/w via wishbone" << endl;
+    outPorts << indent << "    -- registers r/w via wishbone" << endl;
     QList<BlockParameter*> listWB = reference->getWishboneParameters();
     for(i=0;i<listWB.size()-1;i++) {
-      out << indent << "    " << listWB.at(i)->toVHDL(BlockParameter::Entity, 0) << endl;
+      outPorts << indent << "    " << listWB.at(i)->toVHDL(BlockParameter::Entity, 0) << endl;
     }
-    out << indent << "    " << listWB.at(i)->toVHDL(BlockParameter::Entity,BlockParameter::NoComma) << endl;
+    outPorts << indent << "    " << listWB.at(i)->toVHDL(BlockParameter::Entity,BlockParameter::NoComma) << endl;
   }
 
-
-  int count = 0;
-  foreach(AbstractInterface* iface, getInterfaces()) {
-    if((iface->getPurpose() == AbstractInterface::Data)||(iface->getPurpose() == AbstractInterface::Control)) count++;
-  }
   // Generation of the data/control signals
 
-  int flag = 0;
-  bool first = true;
-
-  foreach(AbstractInterface* iface, listInputs) {
-    if(iface->getPurpose() == AbstractInterface::Data) {
-      if (first) {
-        out << indent << "    -- input data ports" << endl;
-        first = false;
-      }
-      count--;
-      if (count == 0) flag = AbstractInterface::NoComma;
-      out << indent << "    " << iface->toVHDL(AbstractInterface::Entity, flag) << endl;
+  QList<AbstractInterface*> listIface = getInterfaces(AbstractInterface::Input, AbstractInterface::Data);
+  if (listIface.size()>0) {
+    outPorts << indent << "    -- input data ports" << endl;
+    foreach(AbstractInterface* iface, listIface) {
+      outPorts << indent << "    " << iface->toVHDL(AbstractInterface::Entity, 0) << endl;
     }
   }
-  first = true;
-  foreach(AbstractInterface* iface, listInputs) {
-    if(iface->getPurpose() == AbstractInterface::Control) {
-      if (first) {
-        out << indent << "    -- input control ports" << endl;
-        first = false;
-      }
-      count--;
-      if (count == 0) flag = AbstractInterface::NoComma;
-      out << indent << "    " << iface->toVHDL(AbstractInterface::Entity, flag) << endl;
+  listIface = getInterfaces(AbstractInterface::Input, AbstractInterface::Control);
+  if (listIface.size()>0) {
+    outPorts << indent << "    -- input control ports" << endl;
+    foreach(AbstractInterface* iface, listIface) {
+      outPorts << indent << "    " << iface->toVHDL(AbstractInterface::Entity, 0) << endl;
     }
   }
-  first = true;
-  foreach(AbstractInterface* iface, listOutputs) {
-    if(iface->getPurpose() == AbstractInterface::Data) {
-      if (first) {
-        out << indent << "    -- output data ports" << endl;
-        first = false;
-      }
-      count--;
-      if (count == 0) flag = AbstractInterface::NoComma;
-      out << indent << "    " << iface->toVHDL(AbstractInterface::Entity, flag) << endl;
+  listIface = getInterfaces(AbstractInterface::Output, AbstractInterface::Data);
+  if (listIface.size()>0) {
+    outPorts << indent << "    -- output data ports" << endl;
+    foreach(AbstractInterface* iface, listIface) {
+      outPorts << indent << "    " << iface->toVHDL(AbstractInterface::Entity, 0) << endl;
     }
   }
-  first = true;
-  foreach(AbstractInterface* iface, listOutputs) {
-    if(iface->getPurpose() == AbstractInterface::Control) {
-      if (first) {
-        out << indent << "    -- output control ports" << endl;
-        first = false;
-      }
-      count--;
-      if (count == 0) flag = AbstractInterface::NoComma;
-      out << indent << "    " << iface->toVHDL(AbstractInterface::Entity, flag) << endl;
+  listIface = getInterfaces(AbstractInterface::Output, AbstractInterface::Control);
+  if (listIface.size()>0) {
+    outPorts << indent << "    -- output control ports" << endl;
+    foreach(AbstractInterface* iface, listIface) {
+      outPorts << indent << "    " << iface->toVHDL(AbstractInterface::Entity, 0) << endl;
     }
   }
-  first = true;
-  foreach(AbstractInterface* iface, listBidirs) {
-    if(iface->getPurpose() == AbstractInterface::Data) {
-      if (first) {
-        out << indent << "    -- bidirs data ports" << endl;
-        first = false;
-      }
-      count--;
-      if (count == 0) flag = AbstractInterface::NoComma;
-      out << indent << "    " << iface->toVHDL(AbstractInterface::Entity, flag) << endl;
+  listIface = getInterfaces(AbstractInterface::InOut, AbstractInterface::Data);
+  if (listIface.size()>0) {
+    outPorts << indent << "    -- bidirs data ports" << endl;
+    foreach(AbstractInterface* iface, listIface) {
+      outPorts << indent << "    " << iface->toVHDL(AbstractInterface::Entity, 0) << endl;
     }
   }
+
+  ports.chop(2);
+  ports += "\n";
+  out << ports;
   out << indent << "    );" << endl << endl;
 
 }
 
 void FunctionalBlock::generateArchitecture(QTextStream& out, QDomElement &elt ) throw(Exception) {
+  QRegularExpression rxPort("@\\{([a-zA-Z0-9_]+)\\}");
   QString expr;
   QString code = elt.text();
-  cout << qPrintable(code) << endl;
+  //cout << qPrintable(code) << endl;
   out << "architecture rtl of " << name << " is" << endl;
 
   QStringList listLine = code.split("\n");
@@ -1610,12 +1603,72 @@ void FunctionalBlock::generateArchitecture(QTextStream& out, QDomElement &elt )
     }
 */
     if(line.contains("@{")) {
-      out << line << endl;
+      QMap<QString,QString> modifs;
+      //cout << qPrintable(line) << endl;
+      QRegularExpressionMatchIterator matchPort = rxPort.globalMatch(line);
+      while(matchPort.hasNext()) {
+        QRegularExpressionMatch m = matchPort.next();
+        QString refName = m.captured(1);
+        AbstractInterface* refIface = reference->getIfaceFromName(refName);
+        QString funName = getIfaceUserName(refIface);
+        if (!funName.isEmpty()) {
+          modifs.insert(m.captured(0),funName);
+          //cout << "replace " << qPrintable(refIface->getName()) << " by " << qPrintable(funIface->getName()) << endl;
+        }
+      }
+      QMapIterator<QString,QString> iterM(modifs);
+      while(iterM.hasNext()) {
+        iterM.next();
+        QString oldName = iterM.key();
+        QString newName = iterM.value();
+        line.replace(oldName,newName);
+      }
     }
+    out << line << endl;
   }
+
+  out << "end rtl;" << endl;
 }
 
 void FunctionalBlock::generateController(QTextStream &out) throw(Exception) {
   
 }
 
+QString FunctionalBlock::getIfaceUserName(AbstractInterface* refIface) {
+
+  if (! refIface->isReferenceInterface()) return "";
+
+  AbstractInterface* funcIface = NULL;
+
+  if (refIface->getDirection() == AbstractInterface::Input) {
+    foreach(AbstractInterface* iface, getInputs()) {
+      FunctionalInterface* fi = AI_TO_FUN(iface);
+      if (fi->getReference() == refIface) {
+        funcIface = iface;
+        break;
+      }
+    }
+  }
+  else if (refIface->getDirection() == AbstractInterface::Output) {
+    foreach(AbstractInterface* iface, getOutputs()) {
+      FunctionalInterface* fi = AI_TO_FUN(iface);
+      if (fi->getReference() == refIface) {
+        funcIface = iface;
+        break;
+      }
+    }
+  }
+  else if (refIface->getDirection() == AbstractInterface::InOut) {
+    foreach(AbstractInterface* iface, getBidirs()) {
+      FunctionalInterface* fi = AI_TO_FUN(iface);
+      if (fi->getReference() == refIface) {
+        funcIface = iface;
+        break;
+      }
+    }
+  }
+  if (funcIface == NULL) return "";
+
+  return funcIface->getName();
+}
+