X-Git-Url: https://bilbo.iut-bm.univ-fcomte.fr/and/gitweb/blast.git/blobdiff_plain/8d3e09e430e829b9d847847334cbfe37790baca3..8f0bedf735fe2b306c11c3f4a168245a05e37ccd:/BlockImplementation.cpp diff --git a/BlockImplementation.cpp b/BlockImplementation.cpp index af06ef3..23ec8bc 100644 --- a/BlockImplementation.cpp +++ b/BlockImplementation.cpp @@ -5,305 +5,109 @@ #include "ReferenceInterface.h" #include "FunctionalInterface.h" #include "BlockParameter.h" +#include BlockImplementation::BlockImplementation(const QString& _xmlFile) { - xmlFile = _xmlFile; + xmlFile = _xmlFile; + productionCounter = ""; + delta = ""; evaluator = new ArithmeticEvaluator; evaluator->setVariableMarkers("@$"); + + noPatterns = true; } BlockImplementation::BlockImplementation(const QString& _xmlFile, const QString &_referenceXml, const QString &_referenceMd5) { xmlFile = _xmlFile; + productionCounter = ""; + delta = ""; referenceXml = _referenceXml; referenceMd5 = _referenceMd5; + + noPatterns = true; } -void BlockImplementation::assignPatterns(FunctionalBlock *_block) throw(Exception) { +void BlockImplementation::loadPatterns(QDomElement& root) throw(Exception) { + + QDomNodeList patternNode = root.elementsByTagName("patterns"); - block = _block; - - QFile implFile(xmlFile); - - // reading in into QDomDocument - QDomDocument document("implFile"); - - if (!implFile.open(QIODevice::ReadOnly)) { - throw(Exception(IMPLFILE_NOACCESS)); - } - if (!document.setContent(&implFile)) { - implFile.close(); - throw(Exception(IMPLFILE_NOACCESS)); + if (patternNode.isEmpty()) { + cout << "impl has no patterns" << endl; + return; } - implFile.close(); - QDomElement impl = document.documentElement(); - QDomNodeList patternNode = impl.elementsByTagName("patterns"); - if (patternNode.isEmpty()) return; + QDomElement patternElt = patternNode.at(0).toElement(); -} - -void BlockImplementation::generateVHDL(FunctionalBlock* _block, const QString &path) throw(Exception) { - - block = _block; - - QFile implFile(xmlFile); - - // reading in into QDomDocument - QDomDocument document("implFile"); - - if (!implFile.open(QIODevice::ReadOnly)) { - throw(Exception(IMPLFILE_NOACCESS)); - } - if (!document.setContent(&implFile)) { - implFile.close(); - throw(Exception(IMPLFILE_NOACCESS)); - } - implFile.close(); - - bool genController = false; - QString coreFile = ""; - QString controllerFile = ""; - - if (reference->isWBConfigurable()) { - genController = true; - controllerFile = path; - controllerFile.append(block->getName()); - controllerFile.append("_ctrl.vhd"); - } - else { - controllerFile = "nofile.vhd"; - } - coreFile = path; - coreFile.append(block->getName()); - coreFile.append(".vhd"); - - QFile vhdlCore(coreFile); - QFile vhdlController(controllerFile); - - if (!vhdlCore.open(QIODevice::WriteOnly)) { - throw(Exception(VHDLFILE_NOACCESS)); - } - - if (genController) { - if (!vhdlController.open(QIODevice::WriteOnly)) { - throw(Exception(VHDLFILE_NOACCESS)); - } - } - QTextStream outCore(&vhdlCore); - QTextStream outController; - if (genController) { - outController.setDevice(&vhdlController); - } - - try { - - - //Get the root element - QDomElement impl = document.documentElement(); - QDomElement eltComments = impl.firstChildElement("comments"); - generateComments(eltComments, coreFile, outCore); - QDomElement eltLibs = eltComments.nextSiblingElement("libraries"); - generateLibraries(eltLibs, outCore); - generateEntity(outCore, genController); - QDomElement eltArch = eltLibs.nextSiblingElement("architecture"); - generateArchitecture(eltArch, outCore); - if (genController) { - generateController(outController); - } - } - catch(Exception err) { - throw(err); - } - - vhdlCore.close(); - vhdlController.close(); -} - -// This function generates the comments part of the VHDL document -void BlockImplementation::generateComments(QDomElement &elt, QString coreFile, QTextStream& out) throw(Exception) { + QDomElement eltDelta = patternElt.firstChildElement("delta"); + delta = eltDelta.attribute("value","none"); + if (delta == "none") throw(Exception(IMPLFILE_CORRUPTED)); - for(int i = 0; i < 50; i++) { - out << "--"; + QDomElement eltCons = eltDelta.nextSiblingElement("consumption"); + + QDomNodeList listNodeInput = eltCons.elementsByTagName("input"); + for(int i=0; i iterP(productionPattern); + while (iterP.hasNext()) { + iterP.next(); + cout << qPrintable(iterP.key()) << " -> " << qPrintable(iterP.value()) << endl; } + cout << "impls patterns read correctly" << endl; + noPatterns = false; } -// This function generates the entity part of the VHDL document -void BlockImplementation::generateEntity(QTextStream& out, bool hasController) throw(Exception) { - - int i=0; - nameEnt = reference->getName(); - //QList listParams = reference->getParameters(); - QList listInputs = reference->getInputs(); - QList listOutputs = reference->getOutputs(); - QList listBidirs = reference->getBidirs(); - QString typePort, namePort; - - out << "entity " << nameEnt << " is\n"; - +bool BlockImplementation::checkPatterns() { - /* TODO : rewrite the generation to take into acocunt the new object hierarchy */ - // Generation of the generics - QList listGenerics = reference->getGenericParameters(); - if ((!listGenerics.isEmpty()) || (hasController)) { - out << " generic (" << endl; - if (hasController) { - out << " wb_data_width : integer = 16;" << endl; - out << " wb_addr_width : integer = 12"; - if (!listGenerics.isEmpty()) out << ";"; - out << endl; - } - for(i=0;itoVHDL(BlockParameter::Entity, 0); - } - out << " " << listGenerics.at(i)->toVHDL(BlockParameter::Entity,BlockParameter::NoComma); - - out << " );" << endl; + if (reference == NULL) { + cout << "no ref. while checking patterns of implementation " << endl; + return false; } - - out << " port (" << endl; - - // Generation of the clk & rst signals - out << " -- clk/rst" << endl; - for(int i = 0; i < listInputs.size(); i++) { - if(listInputs.at(i)->getPurpose() == AbstractInterface::Clock || listInputs.at(i)->getPurpose() == AbstractInterface::Reset) { - out << " " << listInputs.at(i)->getName() << " : in std_logic;" << endl; - } - } - - if (hasController) { - // Generation of the wishbone signals - out << " -- registers r/w via wishbone" << endl; - QList listWB = reference->getWishboneParameters(); - for(i=0;itoVHDL(BlockParameter::Entity, 0); + + AbstractInterface* iface; + QHashIterator iterI(consumptionPattern); + while (iterI.hasNext()) { + iterI.next(); + iface = reference->getIfaceFromName(iterI.key()); + if (iface == NULL) { + cout << "cannot found an input ref. iface for impl. iface " << qPrintable(iterI.key()) << endl; + return false; } - out << " " << listWB.at(i)->toVHDL(BlockParameter::Entity,BlockParameter::NoComma); } - - - // Generation of the data signals - out << "-- data ports\n"; - for(int i = 0; i < listInputs.size(); i++) { - namePort = getIfaceUserName(reference->AbstractBlock::getIfaceFromName(listInputs.at(i)->getName())); - if(listInputs.at(i)->getWidth().compare("1")) - typePort = "std_logic"; - else - typePort = calculateWidth(listInputs.at(i)->getWidth()); - if(listInputs.at(i)->getPurpose() == 1) - out << namePort << " : in std_logic_vector(" << typePort << " -1 downto 0) ;\n"; - } - - for(int i = 0; i < listOutputs.size(); i++) { - namePort = getIfaceUserName(reference->AbstractBlock::getIfaceFromName(listOutputs.at(i)->getName())); - if(listOutputs.at(i)->getWidth().compare("1")) - typePort = "std_logic"; - else - typePort = calculateWidth(listOutputs.at(i)->getWidth()); - if(listOutputs.at(i)->getPurpose() == 1) - out << namePort << " : out std_logic_vector(" << typePort << " -1 downto 0) ;\n"; - } - - for(int i = 0; i < listBidirs.size(); i++) { - namePort = getIfaceUserName(reference->AbstractBlock::getIfaceFromName(listBidirs.at(i)->getName())); - if(listBidirs.at(i)->getWidth().compare(("1"))) - typePort = "std_logic"; - else - typePort = calculateWidth((listBidirs.at(i)->getWidth())); - if(listBidirs.at(i)->getPurpose() == 1) - out << namePort << " : inout std_logic_vector(" << typePort << " -1 downto 0) ;\n"; - } -} - -// This function generates the architecture part of the VHDL document -void BlockImplementation::generateArchitecture(QDomElement &elt, QTextStream& out) throw(Exception) { - - QString expr; - QDomElement eltArch = elt.nextSiblingElement("architecture"); - out << "architecture " << nameEnt <<"_1 of " << nameEnt << "is\n"; - QString implText = eltArch.text(); - QStringList listLine = implText.split("\n"); - for(int i =0; i < listLine.size(); i++) { - if(listLine.at(i).contains(QRegularExpression("@foreach{")) != -1) { - while(listLine.at(i).compare("@endforeach") != -1) { - expr = expr + listLine.at(i) + '\n'; - i++; - } - expr = expr + listLine.at(i); - out << evalComplex(expr, 1) << '\n'; - } - if(listLine.at(i).contains(QRegularExpression("@caseeach{")) != -1) { - while(listLine.at(i).compare("@endcaseeach") != -1) { - expr = expr + listLine.at(i) + '\n'; - i++; - } - expr = expr + listLine.at(i); - out << evalComplex(expr, 2) << '\n'; + QHashIterator iterO(productionPattern); + while (iterO.hasNext()) { + iterO.next(); + iface = reference->getIfaceFromName(iterO.key()); + if (iface == NULL) { + cout << "cannot found an output ref. iface for impl. iface " << qPrintable(iterI.key()) << endl; + return false; } - - if(listLine.at(i).contains('@') == -1) - out << listLine.at(i) << "\n"; - else - out << eval(listLine.at(i), out) << "\n"; - } -} - -void BlockImplementation::generateController(QTextStream &out) throw(Exception) { + } + return true; } QString BlockImplementation::eval(QString line, QTextStream& out) { @@ -527,7 +331,13 @@ QDataStream& operator<<(QDataStream &out, const BlockImplementation &impl) { toWrite << impl.xmlFile; toWrite << impl.referenceXml; toWrite << impl.referenceMd5; - + // saving patterns + toWrite << impl.noPatterns; + toWrite << impl.delta; + toWrite << impl.consumptionPattern; + toWrite << impl.productionPattern; + toWrite << impl.productionCounter; + out << blockData; return out; @@ -544,6 +354,12 @@ QDataStream& operator>>(QDataStream &in, BlockImplementation &impl) { in >> impl.xmlFile; in >> impl.referenceXml; in >> impl.referenceMd5; + // loading patterns + in >> impl.noPatterns; + in >> impl.delta; + in >> impl.consumptionPattern; + in >> impl.productionPattern; + in >> impl.productionCounter; return in; }