X-Git-Url: https://bilbo.iut-bm.univ-fcomte.fr/and/gitweb/blast.git/blobdiff_plain/8f0bedf735fe2b306c11c3f4a168245a05e37ccd..14cd6d834ab531525a51c6a6992583b3e9143e02:/Dispatcher.cpp diff --git a/Dispatcher.cpp b/Dispatcher.cpp index c3ff33f..b9e09a9 100644 --- a/Dispatcher.cpp +++ b/Dispatcher.cpp @@ -2,6 +2,8 @@ #include "Parameters.h" #include "MainWindow.h" +#include "ExternalResource.h" + #include "Graph.h" #include "ReferenceBlock.h" #include "GroupBlock.h" @@ -71,6 +73,7 @@ GroupWidget *Dispatcher::loadProject(const QString& filename) { QFileInfo info(filename); params->projectPath = info.absolutePath(); + params->projectName = info.baseName(); cout << "project path = " << qPrintable(params->projectPath) << endl; groupList.append(topGroup); return topGroup; @@ -174,6 +177,93 @@ void Dispatcher::changeConnectionMode(int mode){ */ } +void Dispatcher::generateVHDL() throw(Exception) { + static QString fctName = "Dispatcher::generateVHDL()"; +#ifdef DEBUG_FCTNAME + cout << "call to " << qPrintable(fctName) << endl; +#endif + + QDir baseDir(params->projectPath); + QDir srcDir(params->projectPath+"/src"); + + if (!baseDir.exists()) { + cerr << "Project path " << qPrintable(params->projectPath) << " no longer exists. First, recreate it and put the project file within. Then retry to generate." << endl; + return; + } + + if (srcDir.exists()) { + srcDir.removeRecursively(); + } + baseDir.mkdir("src"); + + if (! baseDir.exists("testbench")) { + baseDir.mkdir("testbench"); + } + if (! baseDir.exists("Makefile")) { + QFile make("/home/sdomas/Projet/Blast/code/blast/Makefile-isim"); + QString dest = params->projectPath; + dest += "/Makefile"; + make.copy(dest); + } + + // copying external resources + QString dest = params->projectPath; + dest += "/src/"; + try { + params->getGraph()->generateVHDL(dest); + + QList extResources = params->getGraph()->getExternalResources(); + foreach(QString name, extResources) { + cout << qPrintable(name) << endl; + QList lstRes = params->searchResourceByName(name); + foreach(ExternalResource* res, lstRes) { + QFile resFile(res->getFile()); + QFileInfo info(res->getFile()); + QString destFile = dest+info.fileName(); + cout << "copying " << qPrintable(res->getFile()) << " into " << qPrintable(destFile) << endl; + resFile.copy(destFile); + } + } + } + catch(Exception e) { + throw(e); + } + + // creating parameters file + QString paramName = params->projectPath+"/params-isim.txt"; + QFile paramFile(paramName); + if (!paramFile.open(QIODevice::WriteOnly)) { + throw(Exception(PROJECTPATH_NOACCESS)); + } + QTextStream out(¶mFile); + out << "PROJECT_NAME := " << params->projectName << endl << endl; + out << "SRC_DIR := src" << endl; + out << "TB_DIR := testbench" << endl << endl; + out << "VHDL_SRC := "; + QStringList filter; + filter << "*.vhd" ; + srcDir.setNameFilters(filter); + QStringList listVHDL = srcDir.entryList(); + for(int j=0;j 0) { + out << "\t"; + } + out << "$(SRC_DIR)/" << qPrintable(listVHDL.at(j)); + if (j != listVHDL.size()-1) { + out << " \\"; + } + out << endl; + } + out << endl; + out << "VL_SRC := ${XILINX}/verilog/src/glbl.v" << endl << endl; + out << "TB_SRC := $(TB_DIR)/$(PROJECT_NAME)_tb.vhd" << endl << endl; + out << "SIMU_EXE := $(PROJECT_NAME)_tb" << endl << endl; + + paramFile.close(); + + +} + void Dispatcher::generateBlockVHDL(BoxItem *item){ static QString fctName = "Dispatcher::generateBlockVHDL()"; #ifdef DEBUG_FCTNAME