X-Git-Url: https://bilbo.iut-bm.univ-fcomte.fr/and/gitweb/blast.git/blobdiff_plain/8f0bedf735fe2b306c11c3f4a168245a05e37ccd..8fb3c55ee009a11db5e1c08a4cfb286979412745:/AbstractInterface.h?ds=sidebyside

diff --git a/AbstractInterface.h b/AbstractInterface.h
index 3a3cb25..95ad4bb 100644
--- a/AbstractInterface.h
+++ b/AbstractInterface.h
@@ -30,6 +30,7 @@ public :
   enum IfaceDirection { AnyDirection = 0, Input = 1, Output = 2, InOut = 3 };  
   enum IfaceVHDLContext {AnyContext = 0, Entity = 1, Component = 2, Instance = 3, Signal = 4 };
   enum IfaceVHDLFlags { NoComma = 1 };
+  enum IfaceClockName { NoName = 0, ClockName, ParameterName };
 
   static int getIntDirection(QString str);
   static int getIntPurpose(QString str);
@@ -53,6 +54,10 @@ public :
   QString getDirectionString();  
   inline AbstractBlock *getOwner() { return owner;}
   inline AbstractInterface* getAssociatedIface() { return associatedIface; }
+  inline QString getClockIfaceString() { return clkIface; }
+  inline int getClockIfaceType() { return clkIfaceType; }
+  AbstractInterface* getClockIface();
+
 
   double getDoubleWidth() throw(QException);
   
@@ -67,6 +72,7 @@ public :
   void setPurpose(int _purpose);
   void setDirection(int _direction);
   bool setAssociatedIface(AbstractInterface* iface);
+  bool setClockIface(QString name);
   
   // testers
   virtual bool isReferenceInterface();
@@ -78,7 +84,7 @@ public :
   
   int typeFromString(const QString &_type);
 
-  QString toVHDL(int context, int flags) throw(Exception);
+  QString toVHDL(IfaceVHDLContext context, int flags) throw(Exception);
 
 protected:
   QString name;
@@ -99,6 +105,17 @@ protected:
    * (NB: a test is done in the method to prevent the other case).
    */
   AbstractInterface* associatedIface;
+  /*!
+   * \brief clkIface represents the clock interface that is used in processes modifying this interface. It is only relevant for
+   * Data interfaces and clock outputs (that comes from a clkrstgen). Since Control interfaces are automatically associated to a
+   * Data interface, clkIface is "" for them. Wishbone interfaces
+   * In general, blocks have a single
+   * clock interface which is by default automatically connected to the main clock dispatched by the clkrstgen block in top group.
+   * Nevertheless, the designer has the possibility to connect the block taht owns this interface to another clkrstgen block.  Moreover,
+   * some blocks may have several clocks, e.g. dual port RAMs, FIFOs.
+   */
+  QString clkIface;
+  int clkIfaceType; // 0 for not affected, 1 for clock input name, 2 for user param name
   
   
 };