X-Git-Url: https://bilbo.iut-bm.univ-fcomte.fr/and/gitweb/blast.git/blobdiff_plain/abbc64cf04a35ab3549d5c516f44c7c5921baa63..2bdaa0aa3fab52f0808f60d9bbdabcd56d0efae9:/AbstractBlock.h diff --git a/AbstractBlock.h b/AbstractBlock.h index 2c89cbf..fe3f90e 100644 --- a/AbstractBlock.h +++ b/AbstractBlock.h @@ -4,7 +4,9 @@ #include #include +#include +#include "AbstractInterface.h" class AbstractInterface; class BlockParameter; @@ -18,44 +20,79 @@ using namespace Qt; class AbstractBlock { public: + + enum BlockVHDLContext {AnyContext = 0, Entity = 1, Component = 2, Architecture = 3 }; // NB : 3 is when creating an instance of the block that owns this iface AbstractBlock(); - AbstractBlock(const QString& _name); + //AbstractBlock(const QString& _name); virtual ~AbstractBlock(); // getters inline QString getName() { return name; } + inline int nbParameters() { return params.size(); } inline QList getParameters() { return params; } inline QList getInputs() { return inputs; } inline QList getOutputs() { return outputs; } - inline QList getBidirs() { return bidirs; } + inline QList getBidirs() { return bidirs; } QList getUserParameters(); QList getGenericParameters(); QList getPortParameters(); QList getWishboneParameters(); inline AbstractBlock* getParent() { return parent; } + inline bool getPatternComputed() { return patternComputed; } + inline int getTraversalLevel() { return traversalLevel; } + // setters void setName(const QString& str); virtual void setParent(AbstractBlock* _parent); + inline void setPatternComputed(bool state) { patternComputed = state; } + inline void resetTraversalLevel() { traversalLevel = -1; } + inline void setTraversalLevel(int level) { traversalLevel = level; } // testers virtual bool isReferenceBlock(); virtual bool isFunctionalBlock(); virtual bool isGroupBlock(); + virtual bool isSourceBlock(); //! a source block is outside the top group and simulates a peripheral (NB: this is also a generator) + virtual bool isTopGroupBlock(); + bool isGeneratorBlock(); //! a generator block has no data inputs and thus executes infinitely bool isWBConfigurable(); // others + + /*! + * \brief connectClkReset connects the clock and reset inputs to a clkrstgen block or the the group ifaces + * \param idBlockClk is the id of the clock interface (there may be severals) + * \param idGen is the id of the clkrstgen block + */ + void connectClock(QString clkName, int idGen = 0) throw(Exception); + void connectReset(QString rstName, int idGen = 0) throw(Exception); + virtual QList getExternalResources() = 0; // returns the list of all external files needed for VHDL generation + virtual void generateVHDL(const QString& path) throw(Exception) = 0; // main entry to generate the VHDL code + void generateComponent(QTextStream& out, bool hasController=false) throw(Exception); // generate the component using reference + void generateEntity(QTextStream& out, bool hasController=false) throw(Exception); // generate the entity using reference + virtual void parametersValidation(QList* checkedBlocks, QList* blocksToConfigure) = 0; // ugly but usefull void addParameter(BlockParameter *param); void addInterface(AbstractInterface *inter); void removeInterface(AbstractInterface *inter); + void removeAllInterfaces(); void defineBlockParam(BlockParameter *param); - QList getInterfaces(); + QList getInterfaces(int direction = AbstractInterface::AnyDirection, int purpose = AbstractInterface::AnyPurpose); + QList getDataInputs(); //! return all inputs of type data + QList getDataOutputs(); //! return all inputs of type data + QList getControlInputs(); //! return all inputs of type control + QList getControlOutputs(); //! return all outputs of type control AbstractInterface* getIfaceFromName(QString name); BlockParameter* getParameterFromName(QString name); + // patterns + virtual void checkInputPatternCompatibility() throw(Exception) = 0; + virtual void computeOutputPattern(int nbExec = -1) throw(Exception) = 0; + virtual void computeAdmittanceDelays() throw(Exception) = 0; + protected: @@ -68,11 +105,22 @@ protected: QList inputs; QList outputs; QList bidirs; - + // others - - // NB: only GroupBlock and FunctionalBlock have a real parent + + // patterns + bool patternComputed; + int traversalLevel; // the level (0, 1, ...) during the traversal of the graph + + // NB: only GroupBlock and FunctionalBlock have a real parent, except sources that have no parents AbstractBlock* parent; + + virtual void generateComments(QTextStream& out, QDomElement &elt, QString coreFile) throw(Exception) = 0; // generates comments from element + virtual void generateLibraries(QTextStream& out, QDomElement &elt) throw(Exception) = 0; // generates libraries from element + virtual void generateArchitecture(QTextStream& out, QDomElement &elt ) throw(Exception) = 0; // generate the architecture using element + virtual void generateController(QTextStream& out) throw(Exception) = 0; // generate the wishbone controller of the block + virtual void generateEntityOrComponentBody(QTextStream& out, int indentLevel, bool hasController=false) throw(Exception) = 0; // generate the entity/compo body using reference + }; #endif // __ABSTRACTBLOCK_H__