new

[book_gpu.git] / BookGPU / Chapters / chapter1 / ch1.tex

diff --git a/BookGPU/Chapters/chapter1/ch1.tex b/BookGPU/Chapters/chapter1/ch1.tex
index fc891b5f7311338c3bf99c97290f99958366941e..9c3d8af900e764ebde20e2419476ffc5783aa4b2 100755 (executable)
--- a/BookGPU/Chapters/chapter1/ch1.tex
+++ b/BookGPU/Chapters/chapter1/ch1.tex
@@ -74,7 +74,7 @@ comparison with OpenCL, interested readers may refer to~\cite{ch1:Dongarra}.
 
 \section{Architecture of current GPUs}
 
 
 \section{Architecture of current GPUs}
 

-The architecture  \index{architecture of  a GPU} of  current GPUs  is constantly
+The architecture  \index{GPU!architecture of a} of  current GPUs  is constantly

 evolving.  Nevertheless  some trends remain constant  throughout this evolution.
 Processing units composing a GPU are  far simpler than a traditional CPU and
 it is much easier to integrate many computing units inside a GPU card than to do
 evolving.  Nevertheless  some trends remain constant  throughout this evolution.
 Processing units composing a GPU are  far simpler than a traditional CPU and
 it is much easier to integrate many computing units inside a GPU card than to do


@@ -232,11 +232,11 @@ will explain that.
 
 \section{Memory hierarchy}
 
 
 \section{Memory hierarchy}
 

-The memory hierarchy of  GPUs\index{memory~hierarchy} is different from that of CPUs.  In practice,  there are registers\index{memory~hierarchy!registers}, local
-memory\index{memory~hierarchy!local~memory},                               shared
-memory\index{memory~hierarchy!shared~memory},                               cache
-memory\index{memory~hierarchy!cache~memory},              and              global
-memory\index{memory~hierarchy!global~memory}.
+The memory hierarchy of  GPUs\index{memory hierarchy} is different from that of CPUs.  In practice,  there are registers\index{memory hierarchy!registers}, local
+memory\index{memory hierarchy!local memory},                               shared
+memory\index{memory hierarchy!shared memory},                               cache
+memory\index{memory hierarchy!cache memory},              and              global
+memory\index{memory hierarchy!global memory}.

 
 
 As  previously  mentioned each  thread  can access  its  own  registers.  It  is
 
 
 As  previously  mentioned each  thread  can access  its  own  registers.  It  is