X-Git-Url: https://bilbo.iut-bm.univ-fcomte.fr/and/gitweb/book_gpu.git/blobdiff_plain/b58ebfcbf7790d1cc47a03e023929dd3819832ee..d74981733767eca78dbbe5be810b9b2e239e8aee:/BookGPU/Chapters/chapter17/ch17.aux diff --git a/BookGPU/Chapters/chapter17/ch17.aux b/BookGPU/Chapters/chapter17/ch17.aux index 3fb7c46..c515b8c 100644 --- a/BookGPU/Chapters/chapter17/ch17.aux +++ b/BookGPU/Chapters/chapter17/ch17.aux @@ -1,17 +1,22 @@ \relax -\@writefile{toc}{\author{Guillaume Laville, Christophe Lang, Kamel Mazouzi, Nicolas Marilleau, B\IeC {\'e}n\IeC {\'e}dicte Herrmann, Laurent Philippe}{}} +\@writefile{toc}{\author{Guillaume Laville}{}} +\@writefile{toc}{\author{Christophe Lang}{}} +\@writefile{toc}{\author{Kamel Mazouzi}{}} +\@writefile{toc}{\author{Nicolas Marilleau}{}} +\@writefile{toc}{\author{B\IeC {\'e}n\IeC {\'e}dicte Herrmann}{}} +\@writefile{toc}{\author{Laurent Philippe}{}} \@writefile{loa}{\addvspace {10\p@ }} \@writefile{toc}{\contentsline {chapter}{\numberline {16}Implementing MAS on GPU}{363}} \@writefile{lof}{\addvspace {10\p@ }} \@writefile{lot}{\addvspace {10\p@ }} -\newlabel{chapter17}{{16}{363}} -\@writefile{toc}{\contentsline {section}{\numberline {16.1}Introduction}{363}} -\newlabel{ch17:intro}{{16.1}{363}} +\newlabel{chapter17}{{16}{364}} +\@writefile{toc}{\contentsline {section}{\numberline {16.1}Introduction}{364}} +\newlabel{ch17:intro}{{16.1}{364}} \@writefile{toc}{\contentsline {section}{\numberline {16.2}Running Agent-Based Simulations}{365}} \newlabel{ch17:ABM}{{16.2}{365}} \@writefile{toc}{\contentsline {subsection}{\numberline {16.2.1}Multi-agent systems and parallelism}{365}} -\@writefile{toc}{\contentsline {subsection}{\numberline {16.2.2}MAS Implementation on GPU}{366}} -\newlabel{ch17:subsec:gpu}{{16.2.2}{366}} +\@writefile{toc}{\contentsline {subsection}{\numberline {16.2.2}MAS Implementation on GPU}{367}} +\newlabel{ch17:subsec:gpu}{{16.2.2}{367}} \@writefile{toc}{\contentsline {section}{\numberline {16.3}A first practical example}{368}} \newlabel{ch17:sec:1stmodel}{{16.3}{368}} \@writefile{toc}{\contentsline {subsection}{\numberline {16.3.1}The Collembola model}{368}} @@ -19,13 +24,13 @@ \@writefile{lof}{\contentsline {figure}{\numberline {16.1}{\ignorespaces Evolution algorithm of Collembola model\relax }}{369}} \newlabel{ch17:fig:collem_algorithm}{{16.1}{369}} \@writefile{toc}{\contentsline {subsection}{\numberline {16.3.2}Collembola Implementation}{369}} -\newlabel{ch17:listing:collembola-diffuse}{{16.1}{369}} -\@writefile{lol}{\contentsline {lstlisting}{\numberline {16.1}Collembola OpenCL Diffusion kernel}{369}} +\newlabel{ch17:listing:collembola-diffuse}{{16.1}{370}} +\@writefile{lol}{\contentsline {lstlisting}{\numberline {16.1}Collembola OpenCL Diffusion kernel}{370}} \newlabel{ch17:listing:collembola-reduc}{{16.2}{370}} \@writefile{lol}{\contentsline {lstlisting}{\numberline {16.2}Collembola OpenCL reduction kernel}{370}} \@writefile{toc}{\contentsline {subsection}{\numberline {16.3.3}Collembola performance}{371}} -\@writefile{lof}{\contentsline {figure}{\numberline {16.2}{\ignorespaces Performance of the Collembola model on CPU and GPU\relax }}{371}} -\newlabel{ch17:fig:mior_perfs_collem}{{16.2}{371}} +\@writefile{lof}{\contentsline {figure}{\numberline {16.2}{\ignorespaces Performance of the Collembola model on CPU and GPU\relax }}{372}} +\newlabel{ch17:fig:mior_perfs_collem}{{16.2}{372}} \@writefile{toc}{\contentsline {section}{\numberline {16.4}Second example}{372}} \newlabel{ch17:sec:2ndmodel}{{16.4}{372}} \@writefile{toc}{\contentsline {subsection}{\numberline {16.4.1}The MIOR model}{372}} @@ -33,44 +38,44 @@ \@writefile{loa}{\contentsline {algocf}{\numberline {16}{\ignorespaces Evolution step of each Meta-Mior (microbial colony) agent\relax }}{373}} \newlabel{ch17:seqalgo}{{16}{373}} \@writefile{toc}{\contentsline {subsection}{\numberline {16.4.2}MIOR Implementation}{373}} -\@writefile{toc}{\contentsline {subsubsection}{\numberline {16.4.2.1}Execution mapping on GPU}{373}} \@writefile{lof}{\contentsline {figure}{\numberline {16.3}{\ignorespaces Execution distribution retained on GPU\relax }}{374}} \newlabel{ch17:fig:gpu_distribution}{{16.3}{374}} -\@writefile{toc}{\contentsline {subsubsection}{\numberline {16.4.2.2}Data structures translation}{374}} -\newlabel{ch17:subsec:datastructures}{{16.4.2.2}{374}} +\@writefile{toc}{\contentsline {subsubsection}{\numberline {16.4.2.1}Execution mapping on GPU}{374}} +\@writefile{toc}{\contentsline {subsubsection}{\numberline {16.4.2.2}Data structures translation}{375}} +\newlabel{ch17:subsec:datastructures}{{16.4.2.2}{375}} \newlabel{ch17:listing:mior_data_structures}{{16.3}{375}} \@writefile{lol}{\contentsline {lstlisting}{\numberline {16.3}Main data structures used in a MIOR simulation}{375}} \@writefile{lof}{\contentsline {figure}{\numberline {16.4}{\ignorespaces Compact representation of the topology of a MIOR simulation\relax }}{376}} \newlabel{ch17:fig:csr_representation}{{16.4}{376}} \@writefile{toc}{\contentsline {subsubsection}{\numberline {16.4.2.3}Critical resources access management}{376}} \newlabel{ch17:subsec:concurrency}{{16.4.2.3}{376}} -\newlabel{ch17:listing:mior_kernels}{{16.4}{376}} -\@writefile{lol}{\contentsline {lstlisting}{\numberline {16.4}Main MIOR kernel}{376}} -\newlabel{ch17:fig:mior_launcher}{{16.5}{377}} -\@writefile{lol}{\contentsline {lstlisting}{\numberline {16.5}MIOR simulation launcher}{377}} +\newlabel{ch17:listing:mior_kernels}{{16.4}{377}} +\@writefile{lol}{\contentsline {lstlisting}{\numberline {16.4}Main MIOR kernel}{377}} +\newlabel{ch17:fig:mior_launcher}{{16.5}{378}} +\@writefile{lol}{\contentsline {lstlisting}{\numberline {16.5}MIOR simulation launcher}{378}} \@writefile{toc}{\contentsline {subsubsection}{\numberline {16.4.2.4}Termination detection}{378}} -\@writefile{toc}{\contentsline {subsection}{\numberline {16.4.3}Performance of MIOR implementations}{378}} -\newlabel{ch17:subsec:miorexperiments}{{16.4.3}{378}} +\@writefile{toc}{\contentsline {subsection}{\numberline {16.4.3}Performance of MIOR implementations}{379}} +\newlabel{ch17:subsec:miorexperiments}{{16.4.3}{379}} \@writefile{lof}{\contentsline {figure}{\numberline {16.5}{\ignorespaces CPU and GPU performance on a Tesla C1060 node\relax }}{380}} \newlabel{ch17:fig:mior_perfs_tesla}{{16.5}{380}} \@writefile{lof}{\contentsline {figure}{\numberline {16.6}{\ignorespaces CPU and GPU performance on a personal computer with a Geforce 8800GT\relax }}{381}} \newlabel{ch17:fig:mior_perfs_8800gt}{{16.6}{381}} \@writefile{toc}{\contentsline {section}{\numberline {16.5}Analysis and recommendations}{381}} \newlabel{ch17:analysis}{{16.5}{381}} -\@writefile{toc}{\contentsline {subsection}{\numberline {16.5.1}Analysis}{381}} \@writefile{lof}{\contentsline {figure}{\numberline {16.7}{\ignorespaces Execution time of one multi-simulation kernel on the Tesla platform\relax }}{382}} \newlabel{ch17:fig:monokernel_graph}{{16.7}{382}} \@writefile{lof}{\contentsline {figure}{\numberline {16.8}{\ignorespaces Total execution time for 1000 simulations on the Tesla platform, while varying the number of simulations for each kernel\relax }}{382}} \newlabel{ch17:fig:multikernel_graph}{{16.8}{382}} -\@writefile{toc}{\contentsline {subsection}{\numberline {16.5.2}MAS execution workflow}{382}} -\@writefile{toc}{\contentsline {subsection}{\numberline {16.5.3}Implementation challenges}{383}} +\@writefile{toc}{\contentsline {subsection}{\numberline {16.5.1}Analysis}{382}} +\@writefile{toc}{\contentsline {subsection}{\numberline {16.5.2}MAS execution workflow}{383}} +\@writefile{toc}{\contentsline {subsection}{\numberline {16.5.3}Implementation challenges}{384}} \@writefile{toc}{\contentsline {subsection}{\numberline {16.5.4}MCSMA}{384}} \newlabel{ch17:Mcsma}{{16.5.4}{384}} \@writefile{toc}{\contentsline {section}{\numberline {16.6}Conclusion}{385}} \newlabel{ch17:conclusion}{{16.6}{385}} \@writefile{toc}{\contentsline {section}{Bibliography}{386}} \@setckpt{Chapters/chapter17/ch17}{ -\setcounter{page}{389} +\setcounter{page}{390} \setcounter{equation}{0} \setcounter{enumi}{3} \setcounter{enumii}{0}