X-Git-Url: https://bilbo.iut-bm.univ-fcomte.fr/and/gitweb/dmems12.git/blobdiff_plain/5bd43a57b7e5c885d77aac6dceea8cc19f2cfaea..77fc759e3cccd43e2d9f6ee355069a0e80e5221f:/dmems12.tex?ds=sidebyside

diff --git a/dmems12.tex b/dmems12.tex
index 423b0f7..d8d592d 100644
--- a/dmems12.tex
+++ b/dmems12.tex
@@ -71,18 +71,95 @@
 
 \section{Introduction}
 
-%% blabla +
+Cantilevers  are  used  inside  atomic  force  microscope (AFM) which  provides  high
+resolution images of  surfaces.  Several technics have been  used to measure the
+displacement  of cantilevers  in litterature.   For example,  it is  possible to
+determine  accurately  the  deflection  with different  mechanisms. 
+In~\cite{CantiPiezzo01},   authors  used   piezoresistor  integrated   into  the
+cantilever.   Nevertheless this  approach  suffers from  the  complexity of  the
+microfabrication  process needed  to  implement the  sensor  in the  cantilever.
+In~\cite{CantiCapacitive03},  authors  have  presented an  cantilever  mechanism
+based on  capacitive sensing. This kind  of technic also  involves to instrument
+the cantiliver which result in a complex fabrication process.
+
+In this  paper our attention is focused  on a method based  on interferometry to
+measure cantilevers' displacements.  In  this method cantilevers are illuminated
+by  an optic  source. The  interferometry produces  fringes on  each cantilevers
+which enables to  compute the cantilever displacement.  In  order to analyze the
+fringes a  high speed camera  is used. Images  need to be processed  quickly and
+then  a estimation  method is  required to  determine the  displacement  of each
+cantilever.  In~\cite{AFMCSEM11},  the authors have  used an algorithm  based on
+spline to estimate the cantilevers' positions.
+
+   The overall  process gives
+accurate results  but all the computation  are performed on  a standard computer
+using labview.  Consequently,  the main drawback of this  implementation is that
+the computer is a bootleneck in the overall process. In this paper we propose to
+use a  method based on least  square and to  implement all the computation  on a
+FGPA.
+
+The remainder  of the paper  is organized as  follows. Section~\ref{sec:measure}
+describes  more precisely  the measurement  process. Our  solution based  on the
+least  square   method  and   the  implementation  on   FPGA  is   presented  in
+Section~\ref{sec:solus}.       Experimentations      are       described      in
+Section~\ref{sec:results}.  Finally  a  conclusion  and  some  perspectives  are
+presented.
+
+
+
 %% quelques ref commentÃ©es sur les calculs basÃ©s sur l'interfÃ©romÃ©trie
 
 \section{Measurement principles}
 \label{sec:measure}
 
+
+
+
+
+
+
+
 \subsection{Architecture}
 \label{sec:archi}
 %% description de l'architecture gÃ©nÃ©rale de l'acquisition d'images
 %% avec au milieu une unitÃ© de traitement dont on ne prÃ©cise pas ce
 %% qu'elle est.
 
+In order to develop simple,  cost effective and user-friendly cantilever arrays,
+authors   of    ~\cite{AFMCSEM11}   have   developped   a    system   based   of
+interferometry. In opposition to other optical based systems, using a laser beam
+deflection scheme and  sentitive to the angular displacement  of the cantilever,
+interferometry  is sensitive  to  the  optical path  difference  induced by  the
+vertical displacement of the cantilever.
+
+The system build  by authors of~\cite{AFMCSEM11} has been  developped based on a
+Linnick     interferomter~\cite{Sinclair:05}.    It     is     illustrated    in
+Figure~\ref{fig:AFM}.  A  laser diode  is first split  (by the splitter)  into a
+reference beam and a sample beam  that reachs the cantilever array.  In order to
+be  able to  move  the cantilever  array, it  is  mounted on  a translation  and
+rotational hexapod  stage with  five degrees of  freedom. The optical  system is
+also fixed to the stage.  Thus,  the cantilever array is centered in the optical
+system which  can be adjusted accurately.   The beam illuminates the  array by a
+microscope objective  and the  light reflects on  the cantilevers.  Likewise the
+reference beam  reflects on a  movable mirror.  A  CMOS camera chip  records the
+reference and  sample beams which  are recombined in  the beam splitter  and the
+interferogram.   At the  beginning of  each  experiment, the  movable mirror  is
+fitted  manually in  order to  align the  interferometric  fringes approximately
+parallel  to the cantilevers.   When cantilevers  move due  to the  surface, the
+bending of  cantilevers produce  movements in the  fringes that can  be detected
+with    the    CMOS    camera.     Finally    the    fringes    need    to    be
+analyzed. In~\cite{AFMCSEM11}, the authors used a LabView program to compute the
+cantilevers' movements from the fringes.
+
+\begin{figure}    
+\begin{center}
+\includegraphics[width=\columnwidth]{AFM}
+\end{center}
+\caption{schema of the AFM}
+\label{fig:AFM}   
+\end{figure}
+
+
 %% image tirÃ©e des expÃ©riences.
 
 \subsection{Cantilever deflection estimation}
@@ -156,6 +233,29 @@ $3000$ operations.
 
 \subsection{FPGA constraints}
 
+A field-programmable gate  array (FPGA) is an integrated  circuit designed to be
+configured by  the customer.  A hardware  description language (HDL)  is used to
+configure a  FPGA. FGPAs are  composed of programmable logic  components, called
+logic blocks.  These blocks can be  configured to perform simple (AND, XOR, ...)
+or  complex  combinational  functions.    Logic  blocks  are  interconnected  by
+reconfigurable  links. Modern  FPGAs  contains memory  elements and  multipliers
+which enables to simplify the design and increase the speed. As the most complex
+operation operation on FGPAs is the  multiplier, design of FGPAs should not used
+complex operations. For example, a divider  is not an available operation and it
+should be programmed using simple components.
+
+FGPAs programming  is very different  from classic processors  programming. When
+logic block are programmed and linked  to performed an operation, they cannot be
+reused anymore.  FPGA  are cadenced slowly than classic  processors but they can
+performed pipelined as  well as pipelined operations. A  pipeline provides a way
+manipulate data quickly  since at each clock top to handle  a new data. However,
+using  a  pipeline  consomes more  logics  and  components  since they  are  not
+reusable,  nevertheless it  is probably  the most  efficient technique  on FPGA.
+Parallel  operations   can  be  used   in  order  to  manipulate   several  data
+simultaneously. When  it is  possible, using  a pipeline is  a good  solution to
+manipulate  new  data  at  each  clock  top  and  using  parallelism  to  handle
+simultaneously several data streams.
+
 %% contraintes imposÃ©es par le FPGA : algo pipeline/parallele, pas d'op math complexe, ...
 
 
@@ -328,9 +428,9 @@ Finally, the whole summarizes in an algorithm (called LSQ in the following) in t
 
 \subsubsection{Comparison}
 
-\subsection{VDHL design paradigms}
+\subsection{VHDL design paradigms}
 
-\subsection{VDHL implementation}
+\subsection{VHDL implementation}
 
 \section{Experimental results}
 \label{sec:results}
