all clusters are interconnected by a virtual unidirectional ring network (see
Figure~\ref{fig:4.1}). During the resolution, a Boolean token circulates around
the virtual ring from a master processor to another until the global convergence
-is achieved. So starting from the cluster with rank 1, each master processor $i$
+is achieved. So starting from the cluster with rank 1, each master processor $\ell$
sets the token to \textit{True} if the local convergence is achieved or to
-\textit{False} otherwise, and sends it to master processor $i+1$. Finally, the
+\textit{False} otherwise, and sends it to master processor $\ell+1$. Finally, the
global convergence is detected when the master of cluster 1 receives from the
master of cluster $L$ a token set to \textit{True}. In this case, the master of
cluster 1 broadcasts a stop message to masters of other clusters. In this work,
%\CER{Définitivement, les paramètres réseaux variables ici se rapportent au réseau INTER cluster.}
\section{Conclusion}
The simulation of the execution of parallel asynchronous iterative algorithms on large scale clusters has been presented.
-Our work has demonstrated that using such a simulation tool allow us to
+In this work, we show that SIMGRID is an efficient simulation tool that allows us to
reach the following three objectives:
\begin{enumerate}
executing the algorithm in asynchronous mode.
\end{enumerate}
Our results have shown that in certain conditions, asynchronous mode is
-speeder up to \np[\%]{40} than executing the algorithm in synchronous mode
+speeder up to \np[\%]{40} comparing to the synchronous GMRES method
which is not negligible for solving complex practical problems with more
and more increasing size.
- Several studies have already addressed the performance execution time of
+Several studies have already addressed the performance execution time of
this class of algorithm. The work presented in this paper has
demonstrated an original solution to optimize the use of a simulation
tool to run efficiently an iterative parallel algorithm in asynchronous
mode in a grid architecture.
-\LZK{Perspectives???}
+For our futur works, we plan to extend our experimentations to larger scale platforms by increasing the number of computing cores and the number of clusters.
+We will also have to increase the size of the input problem which will require the use of a more powerful simulation platform. At last, we expect to compare our simulation results to real execution results on real architectures in order to experimentally validate our study.
\section*{Acknowledgment}
