X-Git-Url: https://bilbo.iut-bm.univ-fcomte.fr/and/gitweb/hpcc2014.git/blobdiff_plain/2cc5590f929bcdb64636969b81f6529f2be6a09e..e9cd120f6825d0fd5af216088a20e3af54b7eac0:/hpcc.tex?ds=sidebyside

diff --git a/hpcc.tex b/hpcc.tex
index a074868..2434416 100644
--- a/hpcc.tex
+++ b/hpcc.tex
@@ -695,9 +695,11 @@ In this work, we show that SIMGRID is an efficient simulation tool that allows u
 reach the following three objectives: 
 
 \begin{enumerate}
-\item To have a flexible configurable execution platform resolving the 
-hard exercise to access to very limited but so solicited physical 
-resources;
+\item  To have  a flexible  configurable execution  platform that  allows  us to
+  simulate asynchronous iterative algorithm for  which execution of all parts of
+  the  code is  necessary. Using  simulations before  real execution  is  a nice
+  solution to detect the scalability problems.
+
 \item to ensure the algorithm convergence with a reasonable time and
 iteration number ;
 \item and finally and more importantly, to find the correct combination 
@@ -705,17 +707,18 @@ of the cluster and network specifications permitting to save time in
 executing the algorithm in asynchronous mode.
 \end{enumerate}
 Our results have shown that in certain conditions, asynchronous mode is 
-speeder up to \np[\%]{40} than executing the algorithm in synchronous mode
+speeder up to \np[\%]{40} comparing to the synchronous GMRES method
 which is not negligible for solving complex practical problems with more 
 and more increasing size.
 
- Several studies have already addressed the performance execution time of 
+Several studies have already addressed the performance execution time of 
 this class of algorithm. The work presented in this paper has 
 demonstrated an original solution to optimize the use of a simulation 
 tool to run efficiently an iterative parallel algorithm in asynchronous 
 mode in a grid architecture. 
 
-\LZK{Perspectives???}
+In future works, we plan to extend our experimentations to larger scale platforms by increasing the number of computing cores and the number of clusters. 
+We will also have to increase the size of the input problem which will require the use of a more powerful simulation platform. At last, we expect to compare our simulation results to real execution results on real architectures in order to experimentally validate our study.
 
 \section*{Acknowledgment}
 
