From: asider Date: Tue, 20 Oct 2015 17:07:27 +0000 (+0100) Subject: Page 12 X-Git-Url: https://bilbo.iut-bm.univ-fcomte.fr/and/gitweb/kahina_paper1.git/commitdiff_plain/c11339aa6ecbc7cde5f08f6c738f522f984ecb4c Page 12 --- diff --git a/paper.tex b/paper.tex index a6e1cf8..89416df 100644 --- a/paper.tex +++ b/paper.tex @@ -272,9 +272,10 @@ i}{\frac{1}{z_{i}-z_{j}}}} \subsection{Convergence Condition} The convergence condition determines the termination of the algorithm. It consists in stopping from running the iterative function $H_{i}(z)$ when the roots are sufficiently stable. We consider that the method -converges sufficiently when: +converges sufficiently when : \begin{equation} +\label{eq:Aberth-Conv-Cond} \forall i \in [1,n];\frac{z_{i}^{(k)}-z_{i}^{(k-1)}}{z_{i}^{(k)}}<\xi \end{equation} @@ -376,7 +377,7 @@ polynomials of 48000. In this paper we present a parallel implementation of Ehli GPUs, which details are discussed in the sequel. -\section {A parallel implementation of Aberth method} +\section {A CUDA parallel Ehrlisch-Aberth method} \subsection{Background on the GPU architecture} A GPU is viewed as an accelerator for the data-parallel and @@ -387,9 +388,9 @@ Processors (SPs) organized in several blocks called Streaming Multiprocessors (SMs). It also has a memory hierarchy. It has a private read-write local memory per SP, fast shared memory and read-only constant and texture caches per SM and a read-write -global memory shared by all its SPs~\cite{NVIDIA10} +global memory shared by all its SPs~\cite{NVIDIA10}. - On a CPU equipped with a GPU, all the data-parallel and intensive +On a CPU equipped with a GPU, all the data-parallel and intensive functions of an application running on the CPU are off-loaded onto the GPU in order to accelerate their computations. A similar data-parallel function is executed on a GPU as a kernel by @@ -408,12 +409,12 @@ transferred in and out of the GPU. However, the speed of memory copy between the GPU and the CPU is slower than the memory bandwidths of the GPU memories and, thus, it dramatically affects the performances of GPU computations. Accordingly, it is necessary -to limit data transfers between the GPU and its CPU during the +to limit as much as possible, data transfers between the GPU and its CPU during the computations. \subsection{Background on the CUDA Programming Model} The CUDA programming model is similar in style to a single program -multiple-data (SPMD) softwaremodel. The GPU is treated as a +multiple-data (SPMD) software model. The GPU is viewed as a coprocessor that executes data-parallel kernel functions. CUDA provides three key abstractions, a hierarchy of thread groups, shared memories, and barrier synchronization. Threads have a three @@ -441,12 +442,12 @@ read-only caches. \subsubsection{A sequential Aberth algorithm} -The means steps of Aberth method can expressed as an algorithm -like: +The main steps of Aberth method are shown in Algorithm.\ref{alg1-seq} : \begin{algorithm}[H] +\label{alg1-seq} %\LinesNumbered -\caption{Algorithm to find root polynomial with Aberth method} +\caption{A sequential algorithm to find roots with the Aberth method} \KwIn{$Z^{0}$(Initial root's vector),$\varepsilon$ (error tolerance threshold),P(Polynomial to solve)} @@ -455,7 +456,7 @@ tolerance threshold),P(Polynomial to solve)} \BlankLine -Initialization of the parameter of the polynomial to solve\; +Initialization of the coefficients of the polynomial to solve\; Initialization of the solution vector $Z^{0}$\; \While {$\Delta z_{max}\succ \epsilon$}{ @@ -474,38 +475,39 @@ $\Delta z_{max}$=c\;} \end{algorithm} ~\\ -In this sequential algorithm one thread CPU execute all steps. Let see the step 3 the execution of the iterative function, 2 instructions are needed, the first instruction \textit{save} the solution vector for the previous iteration, the second instruction \textit{update} or compute a new values of the roots. -We have two manner to execute the iterative function, taking a Jacobi iteration who need all the previous value $z^{(k)}_{i}$ to compute the new value $z^{(k+1)}_{i}$we have: +In this sequential algorithm, one CPU thread executes all the steps. Let us look to the $3^{rd}$ step i.e. the execution of the iterative function, 2 sub-steps are needed. The first sub-step \textit{save}s the solution vector of the previous iteration, the second sub-step \textit{update}s or computes the new values of the roots vector. +There exists two ways to execute the iterative function that we call a Jacobi one and a Gauss-Seidel one. With the Jacobi iteration, at iteration $k+1$ we need all the previous values $z^{(k)}_{i}$ to compute the new values $z^{(k+1)}_{i}$, taht is : \begin{equation} H(i,z^{k+1})=\frac{p(z^{(k)}_{i})}{p'(z^{(k)}_{i})-p(z^{(k)}_{i})\sum^{n}_{j=1 j\neq i}\frac{1}{z^{(k)}_{i}-z^{(k)}_{j}}}, i=1,...,n. \end{equation} -Or with the Gauss-seidel iteration, we have: +With the the Gauss-seidel iteration, we have: \begin{equation} -H(i,z^{k+1})=\frac{p(z^{(k)}_{i})}{p'(z^{(k)}_{i})-p(z^{(k)}_{i})\sum^{i-1}_{j=1}\frac{1}{z^{(k)}_{i}-z^{(k+1)}_{j}}+\sum^{n}_{j=i+1}\frac{1}{z^{(k)}_{i}-z^{(k)}_{j}}}, i=1,...,n. +\label{eq:Aberth-H-GS} +H(i,z^{k+1})=\frac{p(z^{(k)}_{i})}{p'(z^{(k)}_{i})-p(z^{(k)}_{i})(\sum^{i-1}_{j=1}\frac{1}{z^{(k)}_{i}-z^{(k+1)}_{j}}+\sum^{n}_{j=i+1}\frac{1}{z^{(k)}_{i}-z^{(k)}_{j}})}, i=1,...,n. \end{equation} -In formula(16), the Gauss-seidel iteration converge more quickly because they used the most fresh computed root $z^{k+1}_{i}$ , at this reason we used Gauss-seidel iteration. +Using Equation.\ref{eq:Aberth-H-GS} for the update sub-step of $H(i,z^{k+1})$, we expect the Gauss-Seidel iteration to converge more quickly because, just as its ancestor (for solving linear systems of equations), it uses the most fresh computed roots $z^{k+1}_{i}$. -The steps 4 of the Aberth method compute the convergence of the roots, using(9) formula. -Both steps 3 and 4 use 1 thread to compute N roots on CPU, which is harmful for the large polynomial's roots finding. +The $4^{th}$ step of the algorithm checks the convergence condition using Equation.\ref{eq:Aberth-Conv-Cond}. +Both steps 3 and 4 use 1 thread to compute all the $n$ roots on CPU, which is very harmful for performance in case of the large degree polynomials. \paragraph{The execution time} -Let $T_{i}(N)$: the time to compute one new root's value of the step 3,$T_{i}$ depend on the polynomial's degrees N, when N increase $T_{i}$ increase to. We need $N.T_{i}(N)$ to compute all the new root's value in one iteration on the step 3. +Let $T_{i}(n)$ be the time to compute one new root value at step 3, $T_{i}$ depends on the polynomial's degree $n$. When $n$ increase $T_{i}(n)$ increases too. We need $n.T_{i}(n)$ to compute all the new values in one iteration at step 3. -Let $T_{j}$: the time to compute one root's convergence value of the step 4, we need $N.T_{j}$ to compute all the root's convergence value in one iteration on the step 4. +Let $T_{j}$ be the time needed to check the convergence of one root value at the step 4, so we need $n.T_{j}$ to compute global convergence condition in each iteration at step 4. -The execution time for both steps 3 and 4 can see like: +Thus, the execution time for both steps 3 and 4 is: \begin{equation} -T_{exe}=N(T_{i}(N)+T_{j})+O(n). +T_{iter}=n(T_{i}(n)+T_{j})+O(n). \end{equation} -Let Nbr\_iter the number of iteration necessary to compute all the roots, so the total execution time $Total\_time_{exe}$ can give like: +Let $K$ be the number of iterations necessary to compute all the roots, so the total execution time $Total\_time$ can be given as: \begin{equation} -Total\_time_{exe}=\left[N\left(T_{i}(N)+T_{j}\right)+O(n)\right].Nbr\_iter +Total\_time=\left[n\left(T_{i}(n)+T_{j}\right)+O(n)\right].K \end{equation} -The execution time increase with the increasing of the polynomial's root, which take necessary to parallelize this step to reduce the execution time. In the following paper you explain how we parrallelize this step using GPU architecture with CUDA platform. +The execution time increases with the increasing of the polynomial degree, which justifies to parallelise these steps in order to reduce the global execution time. In the following, we explain how we did parrallelize these steps on a GPU architecture using the CUDA platform. \subsubsection{Parallelize the steps on GPU } On the CPU Aberth algorithm both steps 3 and 4 contain the loop \verb=for=, it use one thread to execute all the instruction in the loop N times. Here we explain how the GPU architecture can compute this loop and reduce the execution time.