Revert "Use a do..while() loop instead of this ugly continue statement."

[loba.git] / Makefile

diff --git a/Makefile b/Makefile
index f7e2171d39aec3725b783015e9df3c56e5762d42..59afd305661ef32ebad623058992b63083ef433e 100644 (file)
--- a/Makefile
+++ b/Makefile
@@ -16,7 +16,7 @@ CPPFLAGS += $(CHECK_FLAGS)
 #CFLAGS += -fgnu89-inline      # workaround simgrid bug
 CFLAGS += $(OPTIM_FLAGS) $(DEBUG_FLAGS)
 
-#CXXFLAGS += -std=c++0x
+CXXFLAGS += -std=c++0x
 CXXFLAGS += $(OPTIM_FLAGS) $(DEBUG_FLAGS)
 
 LDFLAGS += -L $(SIMGRID_INSTALL_DIR)/lib
@@ -26,7 +26,8 @@ LINK.o = $(CXX) $(CXXFLAGS) $(LDFLAGS) $(TARGET_ARCH)
 LDLIBS := -lsimgrid
 
 MAKEDEPEND.FLAGS =  $(CPPFLAGS) -MM -MG -MF $@ $<
-MAKEDEPEND.CXX = $(CXX) $(MAKEDEPEND.FLAGS)
+MAKEDEPEND.C = $(CC) $(CFLAGS) $(MAKEDEPEND.FLAGS)
+MAKEDEPEND.CXX = $(CXX) $(CXXFLAGS) $(MAKEDEPEND.FLAGS)
 
 SRC.loba := main.cpp           \
        communicator.cpp        \
@@ -59,7 +60,7 @@ full:
                echo $(MAKE) "$$target";        \
                $(MAKE) "$$target";             \
        done
-       $(MAKE) xml $(DEFAULT_TARGETS)
+       $(MAKE) $(DEFAULT_TARGETS)
 
 clean:
        $(RM) core core.[0-9]* vgcore.[0-9]*
@@ -70,9 +71,10 @@ clean:
 
 realclean: clean
        $(RM) $(FLAVOURED_LOBA)
-       $(RM) $(XML_DEV_FILES)
        $(RM) *~
 
+.%.d: %.c ; $(MAKEDEPEND.C)
+
 .%.d: %.cpp ; $(MAKEDEPEND.CXX)
 
 $(FLAVOURED_LOBA):