RCE : Correction parrtie expe

diff --git a/paper.tex b/paper.tex
index d5a458c5ee34b250dcfcf544edcf7ed1eb05f01d..f9434f99f107282e52b57eb6e0187428cd870c73 100644 (file)
--- a/paper.tex
+++ b/paper.tex
@@ -555,12 +555,12 @@ architectures and scaling up the input matrix size}
 \begin{center}
 \begin{tabular}{r c }
  \hline
 \begin{center}
 \begin{tabular}{r c }
  \hline

- Grid Architecture & 2x16, 4x8, 4x16 and 8x8\\ %\hline
- Network & N2 : bw=1Gbits/s - lat=5.10$^{-5}$ \\ %\hline
+ Grid Architecture & 2 $\times$ 16, 4 $\times$ 8, 4 $\times$ 16 and 8 $\times$ 8\\ %\hline
+ Inter Network N2 & bw=1Gbits/s - lat=5.10$^{-5}$ \\ %\hline

  Input matrix size & N$_{x}$ $\times$ N$_{y}$ $\times$ N$_{z}$ =150 $\times$ 150 $\times$ 150\\ %\hline
  - &  N$_{x}$ $\times$ N$_{y}$ $\times$ N$_{z}$  =170 $\times$ 170 $\times$ 170    \\ \hline
  \end{tabular}
  Input matrix size & N$_{x}$ $\times$ N$_{y}$ $\times$ N$_{z}$ =150 $\times$ 150 $\times$ 150\\ %\hline
  - &  N$_{x}$ $\times$ N$_{y}$ $\times$ N$_{z}$  =170 $\times$ 170 $\times$ 170    \\ \hline
  \end{tabular}

-\caption{Test conditions: various grid configurations with the input matix size N$_{x}$=150 or N$_{x}$=170 \RC{N2 n'est pas défini..}\RC{Nx est défini, Ny? Nz?}
+\caption{Test conditions: various grid configurations with the input matrix size N$_{x}$=N$_{y}$=N$_{z}$=150 or 170 \RC{N2 n'est pas défini..}\RC{Nx est défini, Ny? Nz?}

 \AG{La lettre 'x' n'est pas le symbole de la multiplication. Utiliser \texttt{\textbackslash times}.  Idem dans le texte, les figures, etc.}}
 \label{tab:01}
 \end{center}
 \AG{La lettre 'x' n'est pas le symbole de la multiplication. Utiliser \texttt{\textbackslash times}.  Idem dans le texte, les figures, etc.}}
 \label{tab:01}
 \end{center}


@@ -571,13 +571,13 @@ architectures and scaling up the input matrix size}
 
 
 In this  section, we analyze the  performance of algorithms running  on various
 
 
 In this  section, we analyze the  performance of algorithms running  on various

-grid configurations  (2x16, 4x8, 4x16  and 8x8). First,  the results in  Figure~\ref{fig:01}
+grid configurations  (2 $\times$ 16, 4 $\times$ 8, 4 $\times$ 16  and 8 $\times$ 8) and using an inter-network N2 defined in the test conditions in Table~\ref{tab:01}. First,  the results in  Figure~\ref{fig:01}

 show for all grid configurations the non-variation of the number of iterations of
 classical  GMRES for  a given  input matrix  size; it is not  the case  for the
 multisplitting method.
 
 show for all grid configurations the non-variation of the number of iterations of
 classical  GMRES for  a given  input matrix  size; it is not  the case  for the
 multisplitting method.
 

-\RC{CE attention tu n'as pas mis de label dans tes figures, donc c'est le bordel, j'en mets mais vérifie...}
-\RC{Les légendes ne sont pas explicites...}
+%\RC{CE attention tu n'as pas mis de label dans tes figures, donc c'est le bordel, j'en mets mais vérifie...}
+%\RC{Les légendes ne sont pas explicites...}

 
 
 \begin{figure} [ht!]
 
 
 \begin{figure} [ht!]


@@ -590,12 +590,11 @@ multisplitting method.
 \end{figure}
 
 
 \end{figure}
 
 

-The execution  times between  the two algorithms  is significant  with different
-grid architectures, even  with the same number of processors  (for example, 2x16
-and  4x8). We  can  observ  the low  sensitivity  of  the Krylov multisplitting  method
+Secondly, the execution  times between  the two algorithms  is significant  with different
+grid architectures, even  with the same number of processors  (for example, 2 $\times$ 16
+and  4 $\times$ 8). We  can  observ  the sensitivity  of  the Krylov multisplitting  method

 (compared with the classical GMRES) when scaling up the number of the processors
 (compared with the classical GMRES) when scaling up the number of the processors

-in the  grid: in  average, the GMRES  (resp. Multisplitting)  algorithm performs
-$40\%$ better (resp. $48\%$) when running from 2x16=32 to 8x8=64 processors. \RC{pas très clair, c'est pas précis de dire qu'un algo perform mieux qu'un autre, selon quel critère?}
+in the  grid: in  average, the reduction of the execution time for GMRES  (resp. Multisplitting)  algorithm is around $40\%$ (resp. around $48\%$) when running from 32 (grid 2 $\times$ 16) to 64 processors (grid 8 $\times$ 8) processors. \RC{pas très clair, c'est pas précis de dire qu'un algo perform mieux qu'un autre, selon quel critère?}

 
 \subsubsection{Running on two different inter-clusters network speeds \\}
 
 
 \subsubsection{Running on two different inter-clusters network speeds \\}
 


@@ -603,20 +602,20 @@ $40\%$ better (resp. $48\%$) when running from 2x16=32 to 8x8=64 processors. \RC
 \begin{center}
 \begin{tabular}{r c }
  \hline
 \begin{center}
 \begin{tabular}{r c }
  \hline

- Grid Architecture & 2x16, 4x8\\ %\hline
- Network & N1 : bw=10Gbs-lat=8.10$^{-6}$ \\ %\hline
+ Grid Architecture & 2 $\times$ 16, 4 $\times$ 8\\ %\hline
+ Inter Networks & N1 : bw=10Gbs-lat=8.10$^{-6}$ \\ %\hline

  - & N2 : bw=1Gbs-lat=5.10$^{-5}$ \\
  Input matrix size & $N_{x} \times N_{y} \times N_{z} =150 \times 150 \times 150$\\ \hline
  \end{tabular}
  - & N2 : bw=1Gbs-lat=5.10$^{-5}$ \\
  Input matrix size & $N_{x} \times N_{y} \times N_{z} =150 \times 150 \times 150$\\ \hline
  \end{tabular}

-\caption{Test conditions: grid 2x16 and 4x8 with  networks N1 vs N2}
+\caption{Test conditions: grid 2 $\times$ 16 and 4 $\times$ 8 with  networks N1 vs N2}

 \label{tab:02}
 \end{center}
 \end{table}
 
 \label{tab:02}
 \end{center}
 \end{table}
 

-These experiments  compare the  behavior of  the algorithms  running first  on a
-speed inter-cluster  network (N1) and  also on  a less performant  network (N2). \RC{Il faut définir cela avant...}
+In this section, the experiments  compare the  behavior of  the algorithms  running on a
+speeder inter-cluster  network (N1) and  also on  a less performant  network (N2) respectively defined in the test conditions Table~\ref{tab:02}. \RC{Il faut définir cela avant...}

 Figure~\ref{fig:02} shows that end users will reduce the execution time
 Figure~\ref{fig:02} shows that end users will reduce the execution time

-for  both  algorithms when using  a  grid  architecture  like  4x16 or  8x8: the reduction is about $2$. The results depict  also that when
+for  both  algorithms when using  a  grid  architecture  like  4 $\times$ 16 or  8 $\times$ 8: the reduction is about $2$. The results depict  also that when

 the  network speed  drops down (variation of 12.5\%), the  difference between  the two Multisplitting algorithms execution times can reach more than 25\%.
 
 
 the  network speed  drops down (variation of 12.5\%), the  difference between  the two Multisplitting algorithms execution times can reach more than 25\%.
 
 


@@ -625,7 +624,7 @@ the  network speed  drops down (variation of 12.5\%), the  difference between  t
 \begin{figure} [ht!]
 \centering
 \includegraphics[width=100mm]{cluster_x_nodes_n1_x_n2.pdf}
 \begin{figure} [ht!]
 \centering
 \includegraphics[width=100mm]{cluster_x_nodes_n1_x_n2.pdf}

-\caption{Grid 2x16 and 4x8 with networks N1 vs N2
+\caption{Grid 2 $\times$ 16 and 4 $\times$ 8 with networks N1 vs N2

 \AG{\np{8E-6}, \np{5E-6} au lieu de 8E-6, 5E-6}}
 \label{fig:02}
 \end{figure}
 \AG{\np{8E-6}, \np{5E-6} au lieu de 8E-6, 5E-6}}
 \label{fig:02}
 \end{figure}


@@ -638,7 +637,7 @@ the  network speed  drops down (variation of 12.5\%), the  difference between  t
 \centering
 \begin{tabular}{r c }
  \hline
 \centering
 \begin{tabular}{r c }
  \hline

- Grid Architecture & 2x16\\ %\hline
+ Grid Architecture & 2 $\times$ 16\\ %\hline

  Network & N1 : bw=1Gbs \\ %\hline
  Input matrix size & $N_{x} \times N_{y} \times N_{z} = 150 \times 150 \times 150$\\ \hline
  \end{tabular}
  Network & N1 : bw=1Gbs \\ %\hline
  Input matrix size & $N_{x} \times N_{y} \times N_{z} = 150 \times 150 \times 150$\\ \hline
  \end{tabular}


@@ -674,7 +673,7 @@ magnitude with a latency of $8.10^{-6}$.
 \centering
 \begin{tabular}{r c }
  \hline
 \centering
 \begin{tabular}{r c }
  \hline

- Grid Architecture & 2x16\\ %\hline
+ Grid Architecture & 2 $\times$ 16\\ %\hline

  Network & N1 : bw=1Gbs - lat=5.10$^{-5}$ \\ %\hline
  Input matrix size & $N_{x} \times N_{y} \times N_{z} =150 \times 150 \times 150$\\ \hline \\
  \end{tabular}
  Network & N1 : bw=1Gbs - lat=5.10$^{-5}$ \\ %\hline
  Input matrix size & $N_{x} \times N_{y} \times N_{z} =150 \times 150 \times 150$\\ \hline \\
  \end{tabular}


@@ -703,7 +702,7 @@ of $40\%$ which is only around $24\%$ for the classical GMRES.
 \centering
 \begin{tabular}{r c }
  \hline
 \centering
 \begin{tabular}{r c }
  \hline

- Grid Architecture & 4x8\\ %\hline
+ Grid Architecture & 4 $\times$ 8\\ %\hline

  Network & N2 : bw=1Gbs - lat=5.10$^{-5}$ \\
  Input matrix size & $N_{x}$ = From 40 to 200\\ \hline
  \end{tabular}
  Network & N2 : bw=1Gbs - lat=5.10$^{-5}$ \\
  Input matrix size & $N_{x}$ = From 40 to 200\\ \hline
  \end{tabular}


@@ -735,7 +734,7 @@ But the interesting results are:
 These  findings may  help a  lot end  users to  setup the  best and  the optimal
 targeted environment for the application deployment when focusing on the problem
 size scale up.  It  should be noticed that the same test has  been done with the
 These  findings may  help a  lot end  users to  setup the  best and  the optimal
 targeted environment for the application deployment when focusing on the problem
 size scale up.  It  should be noticed that the same test has  been done with the

-grid 2x16 leading to the same conclusion.
+grid 2 $\times$ 16 leading to the same conclusion.

 
 \subsubsection{CPU Power impacts on performance}
 
 
 \subsubsection{CPU Power impacts on performance}
 


@@ -743,7 +742,7 @@ grid 2x16 leading to the same conclusion.
 \centering
 \begin{tabular}{r c }
  \hline
 \centering
 \begin{tabular}{r c }
  \hline

- Grid architecture & 2x16\\ %\hline
+ Grid architecture & 2 $\times$ 16\\ %\hline

  Network & N2 : bw=1Gbs - lat=5.10$^{-5}$ \\ %\hline
  Input matrix size & $N_{x} = 150 \times 150 \times 150$\\ \hline
  \end{tabular}
  Network & N2 : bw=1Gbs - lat=5.10$^{-5}$ \\ %\hline
  Input matrix size & $N_{x} = 150 \times 150 \times 150$\\ \hline
  \end{tabular}


@@ -804,7 +803,7 @@ The test conditions are summarized in the table~\ref{tab:07}: \\
 \centering
 \begin{tabular}{r c }
  \hline
 \centering
 \begin{tabular}{r c }
  \hline

- Grid Architecture & 2x50 totaling 100 processors\\ %\hline
+ Grid Architecture & 2 $\times$ 50 totaling 100 processors\\ %\hline

  Processors Power & 1 GFlops to 1.5 GFlops\\
    Intra-Network & bw=1.25 Gbits - lat=5.10$^{-5}$ \\ %\hline
    Inter-Network & bw=5 Mbits - lat=2.10$^{-2}$\\
  Processors Power & 1 GFlops to 1.5 GFlops\\
    Intra-Network & bw=1.25 Gbits - lat=5.10$^{-5}$ \\ %\hline
    Inter-Network & bw=5 Mbits - lat=2.10$^{-2}$\\