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\contentsline {figure}{\numberline {1.1}{\ignorespaces Partitionnement : D\IeC {\'e}coupage d'une matrice tridimensionnelle entre deux clusters form\IeC {\'e}s de 18 processeurs chacun}}{6}{figure.1.1}
\contentsline {figure}{\numberline {1.2}{\ignorespaces Partitionnement : D\IeC {\'e}composition en domaines 1D, 2D et 3D}}{7}{figure.1.2}
\contentsline {figure}{\numberline {1.3}{\ignorespaces Mod\IeC {\`e}le de communication synchrone}}{8}{figure.1.3}
\contentsline {figure}{\numberline {1.4}{\ignorespaces Mod\IeC {\`e}le de communication asynchrone}}{9}{figure.1.4}
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\contentsline {figure}{\numberline {2.1}{\ignorespaces Weak vs Strong scaling: Temps d'ex\IeC {\'e}cution et Speedup}}{14}{figure.2.1}
\contentsline {figure}{\numberline {2.2}{\ignorespaces Architecture des CPU multicoeurs}}{17}{figure.2.2}
\contentsline {figure}{\numberline {2.3}{\ignorespaces Mod\IeC {\`e}le MIMD Distribu\IeC {\'e}}}{18}{figure.2.3}
\contentsline {figure}{\numberline {2.4}{\ignorespaces Mod\IeC {\`e}le MIMD partag\IeC {\'e}}}{19}{figure.2.4}
\contentsline {figure}{\numberline {2.5}{\ignorespaces Mod\IeC {\`e}le MIMD hybride}}{20}{figure.2.5}
\contentsline {figure}{\numberline {2.6}{\ignorespaces Evolution de la puissance de calcul mondiale}}{21}{figure.2.6}
\contentsline {figure}{\numberline {2.7}{\ignorespaces M\IeC {\'e}moire MIMD: Architecture UMA}}{22}{figure.2.7}
\contentsline {figure}{\numberline {2.8}{\ignorespaces M\IeC {\'e}moire MIMD: Architecture NUMA}}{23}{figure.2.8}
\contentsline {figure}{\numberline {2.9}{\ignorespaces M\IeC {\'e}moire MIMD: Architecture COMA}}{24}{figure.2.9}
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