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-\contentsline {figure}{\numberline {1.3}{\ignorespaces Mod\IeC {\`e}le de communication synchrone}}{8}{figure.1.3}\r
+\contentsline {figure}{\numberline {1.1}{\ignorespaces D\IeC {\'e}coupage d'une matrice tridimensionnelle entre deux clusters form\IeC {\'e}s de 18 processeurs chacun}}{8}{figure.1.1}\r
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+\contentsline {figure}{\numberline {1.3}{\ignorespaces Mod\IeC {\`e}le de communication synchrone}}{9}{figure.1.3}\r
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+\contentsline {figure}{\numberline {1.5}{\ignorespaces Algorithme it\IeC {\'e}ratif de Jacobi}}{12}{figure.1.5}\r
+\contentsline {figure}{\numberline {1.6}{\ignorespaces Algorithme it\IeC {\'e}ratif GMRES avec red\IeC {\'e}marrage}}{14}{figure.1.6}\r
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+\contentsline {figure}{\numberline {1.10}{\ignorespaces Groupes et communicateur (a) - MPI - Op\IeC {\'e}rations collectives (b)}}{20}{figure.1.10}\r
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+\contentsline {figure}{\numberline {2.9}{\ignorespaces M\IeC {\'e}moire MIMD: Architecture COMA}}{37}{figure.2.9}\r
+\contentsline {figure}{\numberline {2.10}{\ignorespaces Classification des techniques d'analyse de la performance}}{39}{figure.2.10}\r
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-\contentsline {figure}{\numberline {2.8}{\ignorespaces M\IeC {\'e}moire MIMD: Architecture NUMA}}{23}{figure.2.8}\r
-\contentsline {figure}{\numberline {2.9}{\ignorespaces M\IeC {\'e}moire MIMD: Architecture COMA}}{24}{figure.2.9}\r
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