X-Git-Url: https://bilbo.iut-bm.univ-fcomte.fr/and/gitweb/these_charles_emile.git/blobdiff_plain/b85aac77ff9f56f7c83108ff7d3c8732d3045889..c9389c5838efd5d6872ab508eaa000e3a769ed18:/These_RCE.lof diff --git a/These_RCE.lof b/These_RCE.lof index 119827e..8b6954b 100644 --- a/These_RCE.lof +++ b/These_RCE.lof @@ -1,19 +1,26 @@ \select@language {french} \addvspace {10\p@ } -\contentsline {figure}{\numberline {1.1}{\ignorespaces Partitionnement : D\IeC {\'e}coupage d'une matrice tridimensionnelle entre deux clusters form\IeC {\'e}s de 18 processeurs chacun}}{6}{figure.1.1} -\contentsline {figure}{\numberline {1.2}{\ignorespaces Partitionnement : D\IeC {\'e}composition en domaines 1D, 2D et 3D}}{7}{figure.1.2} +\contentsline {figure}{\numberline {1.1}{\ignorespaces D\IeC {\'e}coupage d'une matrice tridimensionnelle entre deux clusters form\IeC {\'e}s de 18 processeurs chacun}}{6}{figure.1.1} +\contentsline {figure}{\numberline {1.2}{\ignorespaces D\IeC {\'e}composition en domaines 1D, 2D et 3D}}{6}{figure.1.2} \contentsline {figure}{\numberline {1.3}{\ignorespaces Mod\IeC {\`e}le de communication synchrone}}{8}{figure.1.3} \contentsline {figure}{\numberline {1.4}{\ignorespaces Mod\IeC {\`e}le de communication asynchrone}}{9}{figure.1.4} +\contentsline {figure}{\numberline {1.5}{\ignorespaces Algorithme it\IeC {\'e}ratif de Jacobi}}{11}{figure.1.5} +\contentsline {figure}{\numberline {1.6}{\ignorespaces Architecture d'une grille de calcul}}{12}{figure.1.6} +\contentsline {figure}{\numberline {1.7}{\ignorespaces Grid'5000 : R\IeC {\'e}partition g\IeC {\'e}ographique}}{13}{figure.1.7} +\contentsline {figure}{\numberline {1.8}{\ignorespaces Groupes et communicateur (a) - MPI - Op\IeC {\'e}rations collectives (b)}}{16}{figure.1.8} +\contentsline {figure}{\numberline {1.9}{\ignorespaces SIMGRID : Les \IeC {\'e}l\IeC {\'e}ments de la plateforme de simulation}}{18}{figure.1.9} +\addvspace {10\p@ } +\contentsline {figure}{\numberline {2.1}{\ignorespaces Weak vs Strong scaling: Temps d'ex\IeC {\'e}cution et Speedup}}{24}{figure.2.1} +\contentsline {figure}{\numberline {2.2}{\ignorespaces Architecture des CPU multicoeurs}}{27}{figure.2.2} +\contentsline {figure}{\numberline {2.3}{\ignorespaces Mod\IeC {\`e}le MIMD Distribu\IeC {\'e}}}{28}{figure.2.3} +\contentsline {figure}{\numberline {2.4}{\ignorespaces Mod\IeC {\`e}le MIMD partag\IeC {\'e}}}{29}{figure.2.4} +\contentsline {figure}{\numberline {2.5}{\ignorespaces Mod\IeC {\`e}le MIMD hybride}}{30}{figure.2.5} +\contentsline {figure}{\numberline {2.6}{\ignorespaces Evolution de la puissance de calcul mondiale}}{31}{figure.2.6} +\contentsline {figure}{\numberline {2.7}{\ignorespaces M\IeC {\'e}moire MIMD: Architecture UMA}}{32}{figure.2.7} +\contentsline {figure}{\numberline {2.8}{\ignorespaces M\IeC {\'e}moire MIMD: Architecture NUMA}}{33}{figure.2.8} +\contentsline {figure}{\numberline {2.9}{\ignorespaces M\IeC {\'e}moire MIMD: Architecture COMA}}{34}{figure.2.9} +\contentsline {figure}{\numberline {2.10}{\ignorespaces Classification des techniques d'analyse de la performance}}{37}{figure.2.10} \addvspace {10\p@ } -\contentsline {figure}{\numberline {2.1}{\ignorespaces Weak vs Strong scaling: Temps d'ex\IeC {\'e}cution et Speedup}}{14}{figure.2.1} -\contentsline {figure}{\numberline {2.2}{\ignorespaces Architecture des CPU multicoeurs}}{17}{figure.2.2} -\contentsline {figure}{\numberline {2.3}{\ignorespaces Mod\IeC {\`e}le MIMD Distribu\IeC {\'e}}}{18}{figure.2.3} -\contentsline {figure}{\numberline {2.4}{\ignorespaces Mod\IeC {\`e}le MIMD partag\IeC {\'e}}}{19}{figure.2.4} -\contentsline {figure}{\numberline {2.5}{\ignorespaces Mod\IeC {\`e}le MIMD hybride}}{20}{figure.2.5} -\contentsline {figure}{\numberline {2.6}{\ignorespaces Evolution de la puissance de calcul mondiale}}{21}{figure.2.6} -\contentsline {figure}{\numberline {2.7}{\ignorespaces M\IeC {\'e}moire MIMD: Architecture UMA}}{22}{figure.2.7} -\contentsline {figure}{\numberline {2.8}{\ignorespaces M\IeC {\'e}moire MIMD: Architecture NUMA}}{23}{figure.2.8} -\contentsline {figure}{\numberline {2.9}{\ignorespaces M\IeC {\'e}moire MIMD: Architecture COMA}}{24}{figure.2.9} \addvspace {10\p@ } \addvspace {10\p@ } \addvspace {10\p@ }