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finished VHDL gen. (but have to test further
[blast.git] / lib / implementations / generator-img_impl.xml
1 <?xml version="1.0" encoding="UTF-8" standalone="yes" ?>
2 <block_impl ref_name="generator-img.xml" ref_md5="">
3   <comments>
4     <author firstname="stephane" lastname="Domas" mail="sdomas@univ-fcomte.fr" />
5     <date creation="2015-05-10" />
6     <related_files list=""/>
7     <description>
8       This component is a generator of a RGB image, read in a CSV file
9     </description>
10     <notes>
11       No notes
12     </notes>
13   </comments>
14
15   <libraries>
16     <library name="IEEE">
17       <package name="std_logic_1164" use="all"/>
18       <package name="numeric_std" use="all"/>
19     </library>
20   </libraries>
21
22   <architecture>
23     
24   </architecture>
25
26   <patterns>
27     <delta value="($img_width+$row_idle)*$img_height" />
28     <consumption>
29     </consumption>
30     <production counter="1">
31       <output name="r_o_enb" pattern="(1{$img_width}0{$row_idle}){$img_height}" />
32       <output name="g_o_enb" pattern="(1{$img_width}0{$row_idle}){$img_height}" />
33       <output name="b_o_enb" pattern="(1{$img_width}0{$row_idle}){$img_height}" />
34     </production>
35   </patterns>
36 </block_impl>