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finalized analysis with clkconvert + started testbench gen.
[blast.git] / lib / implementations / checker_impl.xml
1 <!DOCTYPE checker>
2 <block_impl ref_name="checker.xml" ref_md5="">
3   <comments>
4     <author lastname="" mail="" firstname=""/>
5     <log creation="2018-05-02">
6     </log>
7     <notes>
8     </notes>
9   </comments>
10   <libraries>
11     <library name="ieee">
12       <package name="std_logic_1164" use="all"/>
13       <package name="numeric_std" use="all"/>
14     </library>
15   </libraries>
16   <architecture>
17 begin
18
19 check_process : process (@{clk}, @{reset})
20 begin
21 if @{reset} = '1' then
22
23 @{check_out} &lt;= '0';
24 @{data_out} &lt;= (others => '0');
25 @{data_out_enb} &lt;= '0';
26 @{check_out_enb} &lt;= '0';
27
28 elsif rising_edge(@{clk}) then
29
30 @{check_out} &lt;= '0';
31 @{data_out} &lt;= (others => '0');
32 @{data_out_enb} &lt;= '0';
33 @{check_out_enb} &lt;= '0';
34
35 if @{data_in_enb} = '1' then
36
37 @{data_out} &lt;= @{data_in};
38 @{data_out_enb} &lt;= '1';
39 @{check_out_enb} &lt;= '1';
40
41 if check_type = 1 then
42 if unsigned(@{data_in}) &lt;= inf_value then
43 @{check_out} &lt;= '1';
44 end if;
45 elsif check_type = 2 then
46 if unsigned(@{data_in}) >= inf_value then
47 @{check_out} &lt;= '1';
48 end if;
49 elsif check_type = 3 then
50 if unsigned(@{data_in}) >= inf_value and unsigned(@{data_in}) &lt;= sup_value then
51 @{check_out} &lt;= '1';
52 end if;
53 end if;
54 end if;
55 end if;
56
57 end process check_process;
58 </architecture>
59   <patterns>
60     <delta value="1"/>
61     <consumption>
62       <input pattern="1" name="data_in_enb"/>
63     </consumption>
64     <production counter="1">
65       <output pattern="01" name="data_out_enb"/>
66       <output pattern="01" name="check_out_enb"/>
67     </production>
68   </patterns>
69 </block_impl>