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finalized analysis with clkconvert + started testbench gen.
[blast.git] / lib / implementations / deserializer_3x1_impl.xml
1 <!DOCTYPE deserializer_3x1>
2 <block_impl ref_name="deserializer_3x1.xml" ref_md5="">
3   <comments>
4     <author lastname="" mail="" firstname=""/>
5     <log creation="2018-05-02">
6     </log>
7     <notes>
8     </notes>
9
10   </comments>
11   <libraries>
12     <library name="ieee">
13       <package name="std_logic_1164" use="all"/>
14       <package name="numeric_std" use="all"/>
15     </library>
16   </libraries>
17   <architecture>
18 -- Signals
19 signal do_out : std_logic;
20 signal data1_reg : std_logic_vector(in_width-1 downto 0);
21 signal data2_reg : std_logic_vector(in_width-1 downto 0);
22
23 signal count : unsigned(1 downto 0);
24
25 begin
26
27 deser_process : process (@{clk}, @{reset})
28 begin
29 if @{reset} = '1' then
30 count &lt;= to_unsigned(0, 2);
31 data1_reg &lt;= (others => '0');
32 data2_reg &lt;= (others => '0');
33 @{data1_out} &lt;= (others => '0');
34 @{data2_out} &lt;= (others => '0');
35 @{data3_out} &lt;= (others => '0');
36 do_out &lt;= '0';
37
38 elsif rising_edge(@{clk}) then
39
40 do_out &lt;= '0';
41 @{data1_out} &lt;= (others => '0');
42 @{data2_out} &lt;= (others => '0');
43 @{data3_out} &lt;= (others => '0');
44
45 if @{data_in_enb} = '1' then
46
47 if count = 0 then
48 data1_reg &lt;= @{data_in};
49 count &lt;= count + 1;
50 elsif count = 1 then
51 data2_reg &lt;= @{data_in};
52 count &lt;= count + 1;
53 elsif count = 2 then
54 @{data1_out} &lt;= data1_reg;
55 @{data2_out} &lt;= data2_reg;
56 @{data3_out} &lt;= @{data_in};
57 do_out &lt;= '1';
58 count &lt;= to_unsigned(0, 2);
59 end if;
60 end if;
61 end if;
62
63 end process deser_process;
64
65 @{data1_out_enb} &lt;= do_out;
66 @{data2_out_enb} &lt;= do_out;
67 @{data3_out_enb} &lt;= do_out;
68 </architecture>
69   <patterns>
70     <delta value="3"/>
71     <consumption>
72       <input pattern="111" name="data_in_enb"/>
73     </consumption>
74     <production counter="3">
75       <output pattern="0001" name="data1_out_enb"/>
76       <output pattern="0001" name="data2_out_enb"/>
77       <output pattern="0001" name="data3_out_enb"/>
78     </production>
79   </patterns>
80 </block_impl>