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1 <?xml version="1.0" encoding="UTF-8" standalone="yes" ?>
2 <block_impl ref_name="generator-cst.xml" ref_md5="">
3   <comments>
4     <author firstname="stephane" lastname="Domas" mail="sdomas@univ-fcomte.fr" />
5     <date creation="2015-05-10" />
6     <related_files list=""/>
7     <description>
8       This component is a generator of a sequence of V fixed values, followed by Z idle cycles.
9     </description>
10     <notes>
11       No notes
12     </notes>
13   </comments>
14
15   <libraries>
16     <library name="IEEE">
17       <package name="std_logic_1164" use="all"/>
18       <package name="numeric_std" use="all"/>
19     </library>
20   </libraries>
21
22   <architecture>
23     
24   </architecture>
25
26   <patterns>
27     <delta value="$seq_length" />
28     <consumption>
29     </consumption>
30     <production counter="">
31       <output name="data_o_enb" pattern="1{$seq_length}0{$idle_length}" />
32     </production>
33   </patterns>
34 </block_impl>