modif in VHDLConverter

[blast.git] / lib / references / average-Nx3.xml

diff --git a/lib/references/average-Nx3.xml b/lib/references/average-Nx3.xml
index 76893224ba537df7c86626928611a43966fc233a..24e96a3c9dac2c27afbbec81bb51478cec0ec872 100644 (file)
--- a/lib/references/average-Nx3.xml
+++ b/lib/references/average-Nx3.xml
@@ -4,7 +4,7 @@
     <name>\r
       block average\r
     </name>\r
     <name>\r
       block average\r
     </name>\r

-    <category ids="1,4" />  \r
+    <category ids="4" />  \r

     <description>\r
       <brief>\r
        This block does an average on 3 successives units, over a sequence of N inputs\r
     <description>\r
       <brief>\r
        This block does an average on 3 successives units, over a sequence of N inputs\r


@@ -16,19 +16,20 @@
   </informations>\r
 \r
   <parameters>\r
   </informations>\r
 \r
   <parameters>\r

-    <parameter name="data_width" type="string" value="0" context="user"/>\r
-    <parameter name="nb_data" type="string" value="20" context="user"/>\r
+    <parameter name="data_width" type="positive" value="8" context="user"/>\r
+    <parameter name="nb_data" type="positive" value="10" context="user"/>\r

   </parameters>\r
 \r
   <interfaces>\r
     <inputs>\r
       <input name="clk" type="boolean" width="1" purpose="clock" />\r
       <input name="rst" type="boolean" width="1" purpose="reset" />\r
   </parameters>\r
 \r
   <interfaces>\r
     <inputs>\r
       <input name="clk" type="boolean" width="1" purpose="clock" />\r
       <input name="rst" type="boolean" width="1" purpose="reset" />\r

-      \r

       <input name="data_i" type="expression" width="$data_width" />\r
       <input name="data_i" type="expression" width="$data_width" />\r

+      <control iface="data_i" />\r

     </inputs>\r
     <outputs>\r
       <output name="data_o" type="expression" width="$data_width" multiplicity="1"/>\r
     </inputs>\r
     <outputs>\r
       <output name="data_o" type="expression" width="$data_width" multiplicity="1"/>\r

+      <control iface="data_o" />\r

     </outputs>    \r
   </interfaces>\r
 \r
     </outputs>    \r
   </interfaces>\r
 \r