<block_impl ref_name="clkrstgen.xml" ref_md5="">
<comments>
<author lastname="Domas" mail="sdomas@univ-fcomte.fr" firstname="Stephane"/>
- <date creation="2018-01-10"/>
- <related_files list=""/>
- <description>implementation of cljrstgen that does the connection between
- external and internal clock and reset</description>
- <notes>none</notes>
+ <log creation="2018-05-02">
+ </log>
+ <notes>
+ </notes>
</comments>
<libraries>
<library name="ieee">