QString mail = eltAuthor.attribute("mail","");\r
out << "-- Author(s) : "<<firstName+" "<<lastName<<" ("<<mail<<")" << endl;\r
out << "--" << endl;\r
- QDomElement eltDate = eltAuthor.nextSiblingElement("date");\r
- QString crea = eltDate.attribute("creation","");\r
+ QDomElement eltLog = eltAuthor.nextSiblingElement("log");\r
+ QString crea = eltLog.attribute("creation","");\r
out << "-- Creation Date : "<<crea<< endl;\r
out << "--" << endl;\r
- QDomElement eltRelated = eltDate.nextSiblingElement("related_files");\r
- QString relateds = eltRelated.attribute("list","");\r
- out << "-- Related files :\n"<<relateds<<endl;\r
- out << "--" << endl;\r
- QDomElement eltDesc = eltRelated.nextSiblingElement("description");\r
- QDomElement desc = eltDesc.firstChildElement();\r
- QString descTxt = desc.text();\r
- out << "-- Decription :\n"<<descTxt<<endl;\r
+ QDomNodeList listModifs = eltLog.elementsByTagName("modification");\r
+ for(int j=0;j<listModifs.length();j++) {\r
+ QDomNode nodeModif = listModifs.at(j);\r
+ QDomElement eltModif = nodeModif.toElement();\r
+ }\r
+ out << "-- Description : " << endl;\r
+ out << reference->getDescription() << endl;\r
out << "--" << endl;\r
- QDomElement eltNote = eltDesc.nextSiblingElement("description");\r
+ QDomElement eltNote = eltLog.nextSiblingElement("notes");\r
QDomElement note = eltNote.firstChildElement();\r
QString noteTxt = note.text();\r
- out << "-- Note :\n"<<noteTxt<<endl;\r
+ out << "-- Notes :\n"<<noteTxt<<endl;\r
out << "--" << endl;\r
for(int i = 0; i < 50; i++) {\r
out << "--";\r
categories.append(id);
}
-void ReferenceBlock::setBriefDescription(const QString& str) {
+void ReferenceBlock::setDescription(const QString& str) {
if(str != NULL)
- descriptionBrief = str;
-}
-
-void ReferenceBlock::setDetailedDescription(const QString& str) {
- if(str != NULL)
- descriptionDetail = str;
+ description = str;
}
void ReferenceBlock::addImplementation(BlockImplementation *impl) {
// getting description
cout << "Block info : get description" << endl;
QDomElement eltDesc = eltCat.nextSiblingElement("description");
- // getting brief
- QDomElement eltBrief = eltDesc.firstChildElement("brief");
- QDomNode nodeBriefTxt = eltBrief.firstChild();
- if (nodeBriefTxt.isNull()) {
- descriptionBrief = "no brief description";
- }
- else {
- QDomText txtBrief = nodeBriefTxt.toText();
- descriptionBrief = txtBrief.data().trimmed();
- cout << "block brief desc : " << qPrintable(descriptionBrief) << endl;
- }
- // getting detailed
- QDomElement eltDetail = eltBrief.nextSiblingElement("detailed");
- QDomNode nodeDetailTxt = eltDetail.firstChild();
- if (nodeDetailTxt.isNull()) {
- descriptionDetail = "no detailed description";
+ // getting text
+ QDomNode nodeTxt = eltDesc.firstChild();
+ if (nodeTxt.isNull()) {
+ description = "no description";
}
else {
- QDomText txtDetail = nodeDetailTxt.toText();
- descriptionDetail = txtDetail.data().trimmed();
- cout << "block detail desc : " << qPrintable(descriptionDetail) << endl;
- }
+ QDomText txtBrief = nodeTxt.toText();
+ description = txtBrief.data().trimmed();
+ cout << "block desc : " << qPrintable(description) << endl;
+ }
}
void ReferenceBlock::loadParameters(QDomElement &elt) throw(Exception) {
toWrite << b.name;
toWrite << b.xmlFile;
- toWrite << b.descriptionBrief;
- toWrite << b.descriptionDetail;
+ toWrite << b.description;
toWrite << b.categories;
toWrite << b.hashMd5;
toWrite << b.params.size();
in >> b.name;
in >> b.xmlFile;
- in >> b.descriptionBrief;
- in >> b.descriptionDetail;
+ in >> b.description;
in >> b.categories;
in >> b.hashMd5;
b.params.clear();
ReferenceBlock(const QString _xmlFile);
+ // getters
int getType();
inline QString getXmlFile() { return xmlFile; }
- inline QString getBriefDescription() { return descriptionBrief; }
- inline QString getDetailedDescription() { return descriptionDetail; }
+ inline QString getDescription() { return description; }
inline QList<int> getCategories() { return categories; }
inline QList<BlockImplementation *> getImplementations() { return implementations; }
- inline QString getHashMd5() { return hashMd5; }
-
+ inline QString getHashMd5() { return hashMd5; }
inline AbstractBlock* getParent() { return NULL; }
+ QList<QString> getExternalResources();
- void addCategory(int id);
- void setBriefDescription(const QString& str);
- void setDetailedDescription(const QString& str);
+ // setters
+ void setDescription(const QString& str);
+
+ // others
void addImplementation(BlockImplementation* impl);
+ void addCategory(int id);
void load(QDomElement &elt) throw(Exception);
void setHashMd5();
- QList<QString> getExternalResources();
void generateVHDL(const QString& path) throw(Exception); // main entry to generate the VHDL code
void parametersValidation(QList<AbstractBlock*>* checkedBlocks, QList<AbstractBlock*>* blocksToConfigure);
private:
QString xmlFile; // the xml file from which attributes are initialized.
QString hashMd5;
- QString descriptionBrief;
- QString descriptionDetail;
+ QString description;
QList<int> categories;
QList<BlockImplementation *> implementations; // set when implementations are read
switch(type) {\r
case ClockConvert :\r
checkInputPatternCompatibilityClockConvert();\r
- break;\r
- case ClkRstGen:\r
- checkInputPatternCompatibilityClkRstGen();\r
- break;\r
+ break; \r
}\r
}\r
catch(Exception e) {\r
switch(type) {\r
case ClockConvert :\r
computeOutputPatternClockConvert(nbExec);\r
- break;\r
- case ClkRstGen:\r
- computeOutputPatternClkRstGen(nbExec);\r
- break;\r
+ break; \r
}\r
}\r
catch(Exception e) {\r
}\r
\r
\r
-void SpecialBlock::checkInputPatternCompatibilityClkRstGen() throw(Exception) {\r
-}\r
-void SpecialBlock::computeOutputPatternClkRstGen(int nbExec) throw(Exception) {\r
-}\r
class SpecialBlock : public FunctionalBlock {\r
public:\r
\r
- enum SpecialType { ClockConvert = 0, ClkRstGen = 1 };\r
+ enum SpecialType { ClockConvert = 1 };\r
\r
SpecialBlock(SpecialType _type, GroupBlock* _parent, ReferenceBlock* _reference, bool createIfaces = true) throw(Exception);\r
~SpecialBlock();\r
\r
void checkInputPatternCompatibilityClockConvert() throw(Exception);\r
void computeOutputPatternClockConvert(int nbExec = -1) throw(Exception);\r
- void checkInputPatternCompatibilityClkRstGen() throw(Exception);\r
- void computeOutputPatternClkRstGen(int nbExec = -1) throw(Exception);\r
+\r
\r
};\r
\r
<?xml version="1.0" encoding="UTF-8"?>
<!DOCTYPE QtCreatorProject>
-<!-- Written by QtCreator 4.2.0, 2018-05-02T16:34:14. -->
+<!-- Written by QtCreator 4.2.0, 2018-05-02T22:20:14. -->
<qtcreator>
<data>
<variable>EnvironmentId</variable>
- <value type="QByteArray">{3701e197-5b6c-48ea-9e98-a6cf6de18672}</value>
+ <value type="QByteArray">{c8006d66-d34f-42be-ad10-d0207752286d}</value>
</data>
<data>
<variable>ProjectExplorer.Project.ActiveTarget</variable>
<valuemap type="QVariantMap">
<value type="QString" key="ProjectExplorer.ProjectConfiguration.DefaultDisplayName">Desktop</value>
<value type="QString" key="ProjectExplorer.ProjectConfiguration.DisplayName">Desktop</value>
- <value type="QString" key="ProjectExplorer.ProjectConfiguration.Id">{ed04208c-8774-456b-99b9-4a02094ca7a4}</value>
+ <value type="QString" key="ProjectExplorer.ProjectConfiguration.Id">{2c9bf876-3476-44eb-8065-1f0844704dda}</value>
<value type="int" key="ProjectExplorer.Target.ActiveBuildConfiguration">0</value>
<value type="int" key="ProjectExplorer.Target.ActiveDeployConfiguration">0</value>
<value type="int" key="ProjectExplorer.Target.ActiveRunConfiguration">0</value>
</name>
<category ids="8" />
<description>
- <brief>
- A testing block with 1 input, 1 output
- </brief>
- <detailed>
- A testing block with 1 input, 1 output
- </detailed>
+ A testing block with 1 input, 1 output
</description>
</informations>
</name>
<category ids="8" />
<description>
- <brief>
- A testing block with 2 inputs, 2 outputs
- </brief>
- <detailed>
- A testing block with 2 inputs, 2 outputs
- </detailed>
+ A testing block with 2 inputs, 2 outputs
</description>
</informations>
</name>
<category ids="8" />
<description>
- <brief>
A testing block with 2 inputs, N outputs
- </brief>
- <detailed>
- A testing block with 2 inputs, N outputs
- </detailed>
</description>
</informations>
<xs:group name="commentsElmtGroup">
<xs:sequence>
<xs:element ref="author"/>
- <xs:element ref="date"/>
- <xs:element ref="related_files"/>
- <xs:element ref="description"/>
- <xs:element ref="notes"/>
+ <xs:element ref="log"/>
+ <xs:element name="notes" type="xs:string"/>
</xs:sequence>
</xs:group>
</xs:complexType>
</xs:element>
- <xs:element name="date">
- <xs:complexType>
- <xs:attribute ref="creation" />
- </xs:complexType>
+ <xs:element name="log">
+ <xs:complexType>
+ <xs:sequence>
+ <xs:element ref="modification" minOccurs="0" maxOccurs="unbounded" />
+ </xs:sequence>
+ <xs:attribute ref="creation" />
+ </xs:complexType>
</xs:element>
- <xs:element name="related_files">
- <xs:complexType>
- <xs:attribute ref="list" />
- </xs:complexType>
+ <xs:element name="modification">
+ <xs:complexType>
+ <xs:simpleContent>
+ <xs:extension base="xs:string">
+ <xs:attribute name="id" type="xs:nonNegativeInteger" />
+ <xs:attribute name="date" type="xs:date" />
+ </xs:extension>
+ </xs:simpleContent>
+ </xs:complexType>
</xs:element>
- <xs:element name="description" type="xs:string" />
-
- <xs:element name="notes" type="xs:string" />
-
<xs:element name="libraries">
<xs:complexType>
<xs:sequence>
<block_impl ref_name="apf27-wb-master.xml" ref_md5="">
<comments>
<author firstname="stephane" lastname="Domas" mail="sdomas@univ-fcomte.fr" />
- <date creation="2015-04-27" />
- <related_files list="interconn.vhd,clkrstgen.vhd"/>
- <description>
- This component is an interface between i.MX signals
- and the interconnector component.
- </description>
+ <log creation="2018-05-02">
+ <modification id="1" date="2018-05-02">
+ changed to comply with new structure
+ </modification>
+ </log>
<notes>
- On i.MX<->FPGA connection : the WEIM part of i.MX has a 16 bits bus address
- but only [1:12] bits are connected to FPGA pins. From the i.MX point of view
- it means that reading in memory mapped address 0x0002 or 0x0003 gives the same
- result since the LSB bit of the address is not transmited.
-
- These 12 bits are forwarded to the interconnector which is responsible to
- determine for what IP the data and addr signals must be routed.
-
+ On i.MX<->FPGA connection : the WEIM part of i.MX has a 16 bits bus address
+ but only [1:12] bits are connected to FPGA pins. From the i.MX point of view
+ it means that reading in memory mapped address 0x0002 or 0x0003 gives the same
+ result since the LSB bit of the address is not transmited.
+
+ These 12 bits are forwarded to the interconnector which is responsible to
+ determine for what IP the data and addr signals must be routed.
</notes>
</comments>
<block_impl ref_name="average-Nx3.xml" ref_md5="">
<comments>
<author firstname="stephane" lastname="Domas" mail="sdomas@univ-fcomte.fr" />
- <date creation="2015-04-27" />
- <related_files list=""/>
- <description>
- This component is a average filter on 3 succesives inputs, over N samples
- </description>
+ <log creation="2018-05-02">
+ </log>
<notes>
- No notes
+ This component is a average filter on 3 succesives inputs, over N samples
</notes>
</comments>
<block_impl ref_name="boxfilter_3x3.xml" ref_md5="">
<comments>
<author lastname="" mail="" firstname=""/>
- <date creation="2018-01-10"/>
- <related_files list=""/>
- <description>frdfgdr</description>
- <notes>gregre</notes>
+ <log creation="2018-01-10">
+ </log>
+ <notes>
+ </notes>
</comments>
<libraries>
<library name="ieee">
<block_impl ref_name="checker.xml" ref_md5="">
<comments>
<author lastname="" mail="" firstname=""/>
- <date creation="2018-01-10"/>
- <related_files list=""/>
- <description>frdfgdr</description>
- <notes>gre</notes>
+ <log creation="2018-05-02">
+ </log>
+ <notes>
+ </notes>
</comments>
<libraries>
<library name="ieee">
<block_impl ref_name="clkdomain_convert_1024x8.xml" ref_md5="">
<comments>
<author mail="sdomas@univ-fcomte.fr" lastname="domas" firstname="stephane"/>
- <date creation="2018-04-13"/>
- <related_files list=""/>
- <description>This IP allows to pass 8 bits values from a clock domain to another. It uses a FIFO of 1024 entries.
-</description>
- <notes>This IP allows to pass 8 bits values from a clock domain to another. It uses a FIFO of 1024 entries.</notes>
+ <log creation="2018-05-02">
+ </log>
+ <notes>
+ </notes>
</comments>
<libraries>
<library name="ieee">
<block_impl ref_name="clkrstgen.xml" ref_md5="">
<comments>
<author lastname="Domas" mail="sdomas@univ-fcomte.fr" firstname="Stephane"/>
- <date creation="2018-01-10"/>
- <related_files list=""/>
- <description>implementation of cljrstgen that does the connection between
- external and internal clock and reset</description>
- <notes>none</notes>
+ <log creation="2018-05-02">
+ </log>
+ <notes>
+ </notes>
</comments>
<libraries>
<library name="ieee">
<block_impl ref_name="csvreader.xml" ref_md5="">
<comments>
<author firstname="stephane" lastname="Domas" mail="sdomas@univ-fcomte.fr" />
- <date creation="2015-05-10" />
- <related_files list=""/>
- <description>
- This component read data in a CSV file
- </description>
+ <log creation="2018-05-02">
+ </log>
<notes>
- No notes
</notes>
+
</comments>
<libraries>
<block_impl ref_name="decimator-N.xml" ref_md5="">
<comments>
<author firstname="stephane" lastname="Domas" mail="sdomas@univ-fcomte.fr" />
- <date creation="2015-04-27" />
- <related_files list=""/>
- <description>
- This component is a decimator of N-1 values out of N
- </description>
+ <log creation="2018-05-02">
+ </log>
<notes>
- No notes
- </notes>
+ </notes>
</comments>
<libraries>
<block_impl ref_name="demux.xml" ref_md5="">
<comments>
<author firstname="stephane" lastname="Domas" mail="sdomas@univ-fcomte.fr" />
- <date creation="2015-04-27" />
- <related_files list=""/>
- <description>
- This component is a synchronous demultiplixer with variable number of outputs
- </description>
+ <log creation="2018-05-02">
+ </log>
<notes>
- No notes
</notes>
</comments>
<block_impl ref_name="deserializer_3x1.xml" ref_md5="">
<comments>
<author lastname="" mail="" firstname=""/>
- <date creation="2018-01-10"/>
- <related_files list=""/>
- <description>gre</description>
- <notes>gre</notes>
+ <log creation="2018-05-02">
+ </log>
+ <notes>
+ </notes>
+
</comments>
<libraries>
<library name="ieee">
<block_impl ref_name="generator-cst.xml" ref_md5="">
<comments>
<author firstname="stephane" lastname="Domas" mail="sdomas@univ-fcomte.fr" />
- <date creation="2015-05-10" />
- <related_files list=""/>
- <description>
- This component is a generator of a sequence of V fixed values, followed by Z idle cycles.
- </description>
+ <log creation="2018-05-02">
+ </log>
<notes>
- No notes
</notes>
+
</comments>
<libraries>
<block_impl ref_name="generator-img.xml" ref_md5="">
<comments>
<author firstname="stephane" lastname="Domas" mail="sdomas@univ-fcomte.fr" />
- <date creation="2015-05-10" />
- <related_files list=""/>
- <description>
- This component is a generator of a RGB image, read in a CSV file
- </description>
+ <log creation="2018-05-02">
+ </log>
<notes>
- No notes
</notes>
+
</comments>
<libraries>
<block_impl ref_name="logical_AND_3.xml" ref_md5="">
<comments>
<author lastname="" mail="" firstname=""/>
- <date creation="2018-01-10"/>
- <related_files list=""/>
- <description>yt</description>
- <notes>hyjt</notes>
+ <log creation="2018-05-02">
+ </log>
+ <notes>
+ </notes>
</comments>
<libraries>
<library name="ieee">
<block_impl ref_name="multadd.xml" ref_md5="">\r
<comments>\r
<author firstname="stephane" lastname="Domas" mail="sdomas@univ-fcomte.fr" />\r
- <date creation="2015-04-27" />\r
- <related_files list=""/>\r
- <description>\r
- This component is a multadd\r
- </description>\r
+ <log creation="2018-05-02">\r
+ </log>\r
<notes>\r
- No notes\r
- </notes>\r
+ </notes> \r
</comments>\r
\r
<libraries>\r
<block_impl ref_name="read_csv.xml" ref_md5="">
<comments>
<author lastname="Domas" mail="sdomas@univ-fcomte.fr" firstname="stephane"/>
- <date creation="2018-04-12"/>
- <related_files list="" />
- <description>read a csv file</description>
- <notes>read a csv file</notes>
+ <log creation="2018-05-02">
+ </log>
+ <notes>
+ </notes>
</comments>
<libraries>
<library name="ieee">
<block_impl ref_name="rgb3sx8_to_gs.xml" ref_md5="">
<comments>
<author lastname="" mail="" firstname=""/>
- <date creation="2018-01-10"/>
- <related_files list=""/>
- <description>fez</description>
- <notes>fez</notes>
+ <log creation="2018-05-02">
+ </log>
+ <notes>
+ </notes>
</comments>
<libraries>
<library name="ieee">
<block_impl ref_name="rgb3sx8_to_ycbcr_3DSP.xml" ref_md5="">
<comments>
<author lastname="" mail="" firstname=""/>
- <date creation="2018-01-10"/>
- <related_files list=""/>
- <description>fez</description>
- <notes>fez</notes>
+ <log creation="2018-05-02">
+ </log>
+ <notes>
+ </notes>
</comments>
<libraries>
<library name="ieee">
<block_impl ref_name="scatter.xml" ref_md5="">
<comments>
<author firstname="stephane" lastname="Domas" mail="sdomas@univ-fcomte.fr" />
- <date creation="2015-04-27" />
- <related_files list=""/>
- <description>
- This component scatters an input over X outputs
- </description>
+ <log creation="2018-05-02">
+ </log>
<notes>
- No notes
- </notes>
+ </notes>
</comments>
<libraries>
<block_impl ref_name="threshold_extctl.xml" ref_md5="">
<comments>
<author lastname="" mail="" firstname=""/>
- <date creation="2018-01-10"/>
- <related_files list=""/>
- <description>fez</description>
- <notes>fez</notes>
+ <log creation="2018-05-02">
+ </log>
+ <notes>
+ </notes>
</comments>
<libraries>
<library name="ieee">
</name>
<category ids="8" />
<description>
- <brief>
This block is the wishbone master of the design, connected to the i.MX of APF27
- </brief>
- <detailed>
- This block is the wishbone master of the design, connected to the i.MX of APF27
- </detailed>
</description>
</informations>
</name>\r
<category ids="4" /> \r
<description>\r
- <brief>\r
- This block does an average on 3 successives units, over a sequence of N inputs\r
- </brief>\r
- <detailed>\r
- This block does an average on 3 successives units, over a sequence of N inputs\r
- </detailed> \r
+ This block does an average on 3 successives units, over a sequence of N inputs\r
</description> \r
</informations>\r
\r
<name>boxfilter_3x3</name>
<category ids=""/>
<description>
- <brief>frdfgdr</brief>
- <detailed>gregre</detailed>
+ average filter with a 3x3 mask on grayscale (8 bits) images
</description>
</informations>
<parameters>
<name>checker</name>
<category ids=""/>
<description>
- <brief>gre</brief>
- <detailed>gre</detailed>
+ checks if an input is lower/greater a value, or within an interval.
</description>
</informations>
<parameters>
<!DOCTYPE clkdomain_convert_1024x8>
-<block version="0.1">
+<block version="0.1" special="1">
<informations>
<name>clkdomain_convert_1024x8</name>
<category ids="10"/>
<description>
- <brief>This IP allows to pass 8 bits values from a clock domain to another. It uses a FIFO of 1024 entries.
-</brief>
- <detailed>This IP allows to pass 8 bits values from a clock domain to another. It uses a FIFO of 1024 entries.</detailed>
+ This IP allows to pass 8 bits values from a clock domain to another. It uses a FIFO of 1024 entries.
</description>
</informations>
<parameters>
</name>
<category ids="100" />
<description>
- <brief>
- This block generates a reset signal synchronous to an external clock
- </brief>
- <detailed>
- This block generates a reset signal synchronous to clock. The block is automatically
- connected to the external clock and asynchronous reset.
- </detailed>
+ This block generates a reset signal synchronous to an external clock
+ and relays the external clock.
</description>
</informations>
</name>
<category ids="6" />
<description>
- <brief>
- generates data from a csv file
- </brief>
- <detailed>
- generates data from a csv file
- </detailed>
+ generates data from a csv file
</description>
</informations>
</name>\r
<category ids="4" /> \r
<description>\r
- <brief>\r
- This block does a decimation of N-1 inputs overs N\r
- </brief>\r
- <detailed>\r
- This block does a decimation of N-1 inputs overs N\r
- </detailed> \r
+ This block does a decimation of N-1 inputs overs N\r
</description> \r
</informations>\r
\r
</name>\r
<category ids="1,5" /> \r
<description>\r
- <brief>\r
- This block demux an entry presented on FPGA pins over a variable number of outputs\r
- </brief>\r
- <detailed>\r
- This block demux an entry presented on FPGA pins over a variable number of outputs\r
- </detailed> \r
+ This block demux an entry presented on FPGA pins over a variable number of outputs\r
</description> \r
</informations>\r
\r
<name>deserializer_3x1</name>
<category ids=""/>
<description>
- <brief>gre</brief>
- <detailed>gre</detailed>
+ deserializes 3 parallel inputs into a sequence of 3 outputs
</description>
</informations>
<parameters>
</name>
<category ids="6" />
<description>
- <brief>
- generates V consecutives constant values, followed by Z idle cycles
- </brief>
- <detailed>
- generates V consecutives constant values, followed by Z idle cycles
- </detailed>
+ generates V consecutives constant values, followed by Z idle cycles
</description>
</informations>
</name>
<category ids="6" />
<description>
- <brief>
- generates a RGB image, reading if from a csv file
- </brief>
- <detailed>
- generates a RGB image, reading if from a csv file
- </detailed>
+ generates a RGB image, reading if from a csv file
</description>
</informations>
<name>logical_AND_3</name>
<category ids=""/>
<description>
- <brief>yt</brief>
- <detailed>hyjt</detailed>
+ produces data1_in AND data2_in AND data3_in
</description>
</informations>
<parameters/>
</name>\r
<category ids="3" /> \r
<description>\r
- <brief>\r
- This block multiplies 2 input values, adding the result to a third one.\r
- </brief>\r
- <detailed>\r
This block does d=a*b+c.\r
a/b are provided by input port.\r
c is set via the wishbone interconnector\r
d is forwarded to an output port and can be retrieved via the wishbone interconnector\r
- </detailed> \r
</description> \r
</informations>\r
\r
<name>read_csv</name>
<category ids="6"/>
<description>
- <brief>read a csv file</brief>
- <detailed>read a csv file</detailed>
+ read a csv file
</description>
</informations>
<parameters>
+++ /dev/null
-<?xml version="1.0" encoding="UTF-8" standalone="yes" ?>\r
-<block>\r
- <informations>\r
- <name>\r
- RGB to 16 bits\r
- </name>\r
- <category ids="4" /> \r
- <description>\r
- <brief>\r
- This block does a conversion of an RGB pixel into a 16 bits value\r
- </brief>\r
- <detailed>\r
- This block does a conversion of an RGB pixel into a 16 bits value \r
- </detailed> \r
- </description> \r
- </informations>\r
-\r
- <parameters>\r
- </parameters>\r
-\r
- <interfaces>\r
- <inputs>\r
- <input name="clk" type="boolean" width="1" purpose="clock" />\r
- <input name="rst" type="boolean" width="1" purpose="reset" />\r
- <input name="r_i" type="natural" width="8" />\r
- <input name="g_i" type="natural" width="8" />\r
- <input name="b_i" type="natural" width="8" /> \r
- <control iface="r_i" />\r
- <control iface="g_i" />\r
- <control iface="b_i" /> \r
- </inputs>\r
- <outputs>\r
- <output name="pix_o" type="natural" width="16" multiplicity="1"/>\r
- <control iface="pix_o" />\r
- </outputs> \r
- </interfaces>\r
-\r
-</block>\r
+++ /dev/null
-<?xml version="1.0" encoding="UTF-8" standalone="yes" ?>\r
-<block>\r
- <informations>\r
- <name>\r
- RGB32 (8 bits/serial) to grayscale\r
- </name>\r
- <category ids="4" /> \r
- <description>\r
- <brief>\r
- This block does a conversion of an RGB32 pixel (8 bits/serial) into a grayscale value (8 bits).\r
- </brief>\r
- <detailed>\r
- This block does a conversion of an RGB32 pixel into a grayscale value.\r
- A RGB32 pixel is composed of 4 components: red, green, blue, transparency, each on 8 bits.\r
- They are stored as in little-endian arch. which means that components must enter in the block\r
- in the following order : transparency, blue, green, red.\r
- The block does a simple average over the three values to obtain a grayscale pixel.\r
- It also outputs the transparency component, in case of it should be used after.\r
- </detailed> \r
- </description> \r
- </informations>\r
-\r
- <parameters>\r
- </parameters>\r
-\r
- <interfaces>\r
- <inputs>\r
- <input name="clk" type="boolean" width="1" purpose="clock" />\r
- <input name="rst" type="boolean" width="1" purpose="reset" />\r
- \r
- <input name="compo_i" type="natural" width="8" />\r
- <control iface="compo_i" />\r
- </inputs>\r
- <outputs>\r
- <output name="pix_o" type="natural" width="8" multiplicity="1"/>\r
- <output name="transparency_o" type="natural" width="8" multiplicity="1"/> \r
- <control iface="pix_o" />\r
- <control iface="transparency_o" />\r
- </outputs> \r
- </interfaces>\r
-\r
-</block>\r
<name>rgb3sx8_to_gs</name>
<category ids=""/>
<description>
- <brief>fez</brief>
- <detailed>fez</detailed>
+ converts a RGB 24 bits pixel into grayscale. R, G and B
+ are consumed sequentially on rgb_in.
</description>
</informations>
<parameters>
<name>rgb3sx8_to_ycbcr_3DSP</name>
<category ids=""/>
<description>
- <brief>fez</brief>
- <detailed>fez</detailed>
+ convert an RGB pixel 24 bits, into a Y/Cb/Cr. R, G and B components
+ are consumed sequentially, and Y, Cb, Cr are produced sequentially.
+
</description>
</informations>
<parameters/>
</name>\r
<category ids="1,5" /> \r
<description>\r
- <brief>\r
- This block replicates the input over X outputs, the outputs being created at will.\r
- </brief>\r
- <detailed>\r
- This block replicates the input over X outputs, the outputs being created at will.\r
- </detailed> \r
+ This block replicates the input over X outputs, the outputs being created at will.\r
</description> \r
</informations>\r
\r
<name>threshold_extctl</name>
<category ids=""/>
<description>
- <brief>fez</brief>
- <detailed>fez</detailed>
+ if keep_in is true, data_in is reported on data_out.
+ Otherwise, the dfault_value is reported on data_out.
</description>
</informations>
<parameters>
<xs:sequence>
<xs:element ref="name"/>
<xs:element ref="category"/>
- <xs:element ref="description"/>
- </xs:sequence>
- </xs:group>
-
- <xs:group name="descriptionElmtGroup">
- <xs:sequence>
- <xs:element ref="brief"/>
- <xs:element ref="detailed"/>
+ <xs:element name="description" type="xs:string"/>
</xs:sequence>
</xs:group>
</xs:complexType>
</xs:element>
- <xs:element name="description">
- <xs:complexType>
- <xs:group ref="descriptionElmtGroup"/>
- </xs:complexType>
- </xs:element>
-
- <xs:element name="brief" type="xs:string" />
-
- <xs:element name="detailed" type="xs:string" />
-
<xs:element name="parameters">
<xs:complexType>
<xs:sequence>
<xs:complexType>
<xs:group ref="blockElmtGroup"/>
<xs:attribute name="version" type="xs:string" use="optional" />
+ <xs:attribute name="special" type="xs:nonNegativeInteger" use="optional" />
</xs:complexType>
</xs:element>
</name>
<category ids="6" />
<description>
- <brief>
- A testing source block, with 2 outputs
- </brief>
- <detailed>
A testing source block, with 2 outputs
- </detailed>
</description>
</informations>
