nearly finished GroupBlock VHDL gen

diff --git a/AbstractBlock.cpp b/AbstractBlock.cpp
index 3bb808ead3a61d5491e659821b8e426424e2ae3c..7bdec1b5cdc25a15b1807bf21366a4368edf3945 100644 (file)
--- a/AbstractBlock.cpp
+++ b/AbstractBlock.cpp
@@ -249,7 +249,7 @@ void AbstractBlock::connectClkReset() throw(Exception) {
 \r
   GroupBlock* parentBlock = AB_TO_GRP(parent);\r
 \r
-  cout << "connecting clk/rst for child " << qPrintable(name) << " of " << qPrintable(parentBlock->getName()) << endl;\r
+\r
 \r
   QList<AbstractInterface* > lstClk = getInterfaces(AbstractInterface::Input,AbstractInterface::Clock);\r
   QList<AbstractInterface* > lstRst = getInterfaces(AbstractInterface::Input,AbstractInterface::Reset);\r
@@ -273,10 +273,12 @@ void AbstractBlock::connectClkReset() throw(Exception) {
       fromClk = AI_TO_CON(clkrstgen->getIfaceFromName("clk"));\r
       fromRst = AI_TO_CON(clkrstgen->getIfaceFromName("reset"));\r
     }\r
+    cout << "connecting clk/rst for " << qPrintable(name) << " to clkrstgen" << endl;\r
   }\r
   else {\r
     fromClk = AI_TO_CON(parentBlock->getIfaceFromName("clk"));\r
     fromRst = AI_TO_CON(parentBlock->getIfaceFromName("reset"));\r
+    cout << "connecting clk/rst for child " << qPrintable(name) << " of " << qPrintable(parentBlock->getName()) << endl;\r
   }\r
   if ((fromClk == NULL) || (fromRst == NULL)) {\r
     throw(Exception(IFACE_GROUP_NOCLKRST,parentBlock));\r
@@ -284,6 +286,8 @@ void AbstractBlock::connectClkReset() throw(Exception) {
   else {\r
     fromClk->connectTo(toClk);\r
     fromRst->connectTo(toRst);\r
+    cout << "connection done between " << qPrintable(toClk->getConnectedFrom()->getOwner()->getName()) << "/" << qPrintable(toClk->getConnectedFrom()->getName());\r
+    cout << " and " << qPrintable(toClk->getOwner()->getName()) << "/" << qPrintable(toClk->getName()) << endl;\r
   }\r
 }\r
 \r

diff --git a/AbstractInputModifier.h b/AbstractInputModifier.h
index 6f3abe8f8b3360f3b2c8beb77f3511c14449287d..890daf0c944b50e24525864a71b6a1b11878db17 100644 (file)
--- a/AbstractInputModifier.h
+++ b/AbstractInputModifier.h
@@ -16,7 +16,7 @@ class AbstractInputModifier {
 \r
 public:\r
 \r
-  enum ModifierVHDLContext {AnyContext = 0, Entity = 1, Component = 2, Architecture = 3 };\r
+  enum ModifierVHDLContext {AnyContext = 0, Entity = 1, Component = 2, Architecture = 3, Signal = 4 };\r
   enum ModifierVHDLFlags { NoComma = 1 };\r
       \r
   AbstractInputModifier(ConnectedInterface* _associatedIface);\r

diff --git a/AbstractInterface.cpp b/AbstractInterface.cpp
index 6c51907dc047bd9e89702cac62d696821ca8386c..39e672dbba48223eff149bb37e02a8103b446bd2 100644 (file)
--- a/AbstractInterface.cpp
+++ b/AbstractInterface.cpp
@@ -298,7 +298,17 @@ QString AbstractInterface::toVHDL(int context, int flags) throw(Exception) {
   QString ret="";
 
   bool ok;
-  cout << "iface " << qPrintable(name) << " must be evaluated to vhdl :" << qPrintable(width) << " with type = " << qPrintable(getTypeString()) << endl;
+  //cout << "iface " << qPrintable(name) << " must be evaluated to vhdl :" << qPrintable(width) << " with type = " << qPrintable(getTypeString()) << endl;
+
+  if (context == Instance) {
+    if (direction == Output) {
+      ret = "from_"+owner->getName()+"_"+name;
+    }
+    else if (direction == InOut) {
+      ret = "fromto_"+owner->getName()+"_"+name;
+    }
+    return ret;
+  }
 
   // create the width part
   QString widthStr = "";
@@ -411,10 +421,15 @@ QString AbstractInterface::toVHDL(int context, int flags) throw(Exception) {
     ret += widthStr;
   }
   else if (context == Signal) {
-    ret = widthStr;
-  }
-  else if (context == Architecture) {
-
+    if (direction == Output) {
+      ret = "from_"+owner->getName()+"_"+name+" : "+widthStr;
+    }
+    else if (direction == InOut) {
+      ret = "fromto_"+owner->getName()+"_"+name+" : "+widthStr;
+    }
+    else if (direction == Input) {
+      ret = owner->getName()+"_"+name+" : "+widthStr;
+    }
   }
 
   return ret;

diff --git a/AbstractInterface.h b/AbstractInterface.h
index 1f6dd6f8ed28d2c52bf3a2b96133006211baa124..3a3cb25339c156906713a0c859ab990c42307a80 100644 (file)
--- a/AbstractInterface.h
+++ b/AbstractInterface.h
@@ -28,7 +28,7 @@ public :
   enum IfaceWidthDir { LittleEndian = 1, BigEndian}; //! LittleEndian = X downto 0, BigEndian = 0 to X
   enum IfacePurpose { AnyPurpose = 0, Data = 1, Control, Clock, Reset, Wishbone };
   enum IfaceDirection { AnyDirection = 0, Input = 1, Output = 2, InOut = 3 };  
-  enum IfaceVHDLContext {AnyContext = 0, Entity = 1, Component = 2, Architecture = 3, Signal = 4 }; // NB : 3 is when creating an instance of the block that owns this iface
+  enum IfaceVHDLContext {AnyContext = 0, Entity = 1, Component = 2, Instance = 3, Signal = 4 };
   enum IfaceVHDLFlags { NoComma = 1 };
 
   static int getIntDirection(QString str);

diff --git a/BlockParameter.h b/BlockParameter.h
index 15df2d8ff3dcdbc4d67d868746fa4de4bc799a06..746a574cb85831234ab94cb6e84b54d8220dcb25 100644 (file)
--- a/BlockParameter.h
+++ b/BlockParameter.h
@@ -30,7 +30,7 @@ public :
    */\r
   enum ParamWBAccess { Read = 1, Write = 2};\r
   enum ParamWBDuration { Permanent = 1, Trigger = 2 };\r
-  enum ParamVHDLContext { Entity = 1, Component = 2, Architecture = 3 }; // NB : 3 is when creating an instance of the block that owns this iface\r
+  enum ParamVHDLContext { Entity = 1, Component = 2, Instance = 3 }; // NB : 3 is when creating an instance of the block that owns this iface\r
   enum ParamVHDLFlags { NoComma = 1 };\r
 \r
   BlockParameter();\r

diff --git a/BlockParameterGeneric.cpp b/BlockParameterGeneric.cpp
index b5b5186453d008df7309d6e33805fe878b95d442..d652c3740d90c18632128304320125a7effd1a3e 100644 (file)
--- a/BlockParameterGeneric.cpp
+++ b/BlockParameterGeneric.cpp
@@ -69,13 +69,16 @@ QString BlockParameterGeneric::toVHDL(int context, int flags) {
       ret = formatNoValue.arg(name).arg(getTypeString());\r
     }\r
   }\r
-  else if (context == BlockParameter::Architecture) {\r
+  else if (context == BlockParameter::Instance) {\r
     QString format = "%1 => %2";\r
     if ((flags & BlockParameter::NoComma) == 0) {\r
       format.append(";");\r
     }\r
     AbstractBlock* parent = owner->getParent();\r
-    BlockParameter* p = parent->getParameterFromName(name);\r
+    BlockParameter* p = NULL;\r
+    if (parent != NULL) {\r
+      p = parent->getParameterFromName(name);\r
+    }\r
     if (p != NULL) {\r
       /* the parent group has a generic parameter with the same\r
            name\r

diff --git a/BoxItem.cpp b/BoxItem.cpp
index 85a1c9fb13633078842e7d64c6ef5d409a7d393a..9ff42a88f7feb96f3f4d7ac413f870c2fe778e73 100644 (file)
--- a/BoxItem.cpp
+++ b/BoxItem.cpp
@@ -791,6 +791,17 @@ void BoxItem::loadFunctional(QDomElement funcElement) throw(Exception) {
       functionalBlock->addInterface(ctlIface);
     }    
   }
+  // connect clk and rst to group clk/rst or to clkrstgen
+  if ((name != "clkrstgen") && (parentGroupBlock != NULL)) {
+    try {
+      functionalBlock->connectClkReset();
+    }
+    catch(Exception e) {
+      AbstractBlock* source = (AbstractBlock *)(e.getSource());
+      cerr << qPrintable(source->getName()) << ":" << qPrintable(e.getMessage()) << endl;
+      throw(e);
+    }
+  }
   
   // creating InterfaceItem
   initInterfaceItems();

diff --git a/DelayInputModifier.cpp b/DelayInputModifier.cpp
index e035c388fde9c80836c8421d5c53812510e1a388..a90695a2ecdb6737b92a547ffa527d1e86c666cd 100644 (file)
--- a/DelayInputModifier.cpp
+++ b/DelayInputModifier.cpp
@@ -1,5 +1,6 @@
 #include "DelayInputModifier.h"\r
 #include "ConnectedInterface.h"\r
+#include "AbstractBlock.h"\r
 \r
 DelayInputModifier::DelayInputModifier(ConnectedInterface *_associatedInterface, int _delayLength) : AbstractInputModifier(_associatedInterface) {\r
   setDelayLength(_delayLength);\r
@@ -20,6 +21,52 @@ QList<char>* DelayInputModifier::getModifiedInput(QList<char>* input) {
 \r
 QString DelayInputModifier::toVHDL(int context, int flags) throw(Exception) {\r
 \r
+\r
+  ConnectedInterface* fromCtlIface = associatedIface->getConnectedFrom();\r
+  ConnectedInterface* fromIface = AI_TO_CON(fromCtlIface->getAssociatedIface());\r
+\r
+  ConnectedInterface* toCtlIface = associatedIface;\r
+  ConnectedInterface* toIface = AI_TO_CON(toCtlIface->getAssociatedIface());\r
+  QString toName = toIface->getOwner()->getName()+"_"+toIface->getName();\r
+  QString toCtlName = toCtlIface->getOwner()->getName()+"_"+toCtlIface->getName();\r
+  QString dm1 = "";\r
+  QString dm2 = "";\r
+  dm1.setNum(delayLength-1);\r
+  dm2.setNum(delayLength-2);\r
+  QString ret="";\r
+  if (context == Architecture) {\r
+    ret = toName + "_mod_process : process(clk,reset)\n";\r
+    ret += "  begin\n";\r
+    ret += "    if reset = '1' then\n";\r
+    ret += "      "+toName+"_dly     <= (others => (others => '0'));\n";\r
+    ret += "      "+toCtlName+"_dly  <= (others => '0');\n";\r
+    ret += "      "+toName+"_mod     <= (others => '0');\n";\r
+    ret += "      "+toCtlName+"_mod  <= '0';\n";\r
+    ret += "    elsif rising_edge(clk) then\n";\r
+    ret += "      "+toName+"_mod <= "+toName+"_dly("+dm1+");\n";\r
+    ret += "      "+toCtlName+"_mod  <= "+toCtlName+"_dly("+dm1+");\n";\r
+    ret += "      "+toName+"_dly(0)  <= "+fromIface->toVHDL(AbstractInterface::Instance,0)+";\n";\r
+    ret += "      "+toCtlName+"_dly(0)  <= "+fromCtlIface->toVHDL(AbstractInterface::Instance,0)+";\n";\r
+    ret += "      "+toName+"_dly(1 to "+dm1+")  <= "+toName+"_dly(0 to "+dm2+");\n";\r
+    ret += "      "+toCtlName+"_dly(1 to "+dm1+")  <= "+toCtlName+"_dly(0 to "+dm2+");\n";\r
+    ret += "    end if\n";\r
+    ret += "  end process "+toName + "_mod_process\n";\r
+  }\r
+  else if (context == Signal) {\r
+    QString sig = toIface->toVHDL(AbstractInterface::Signal,0);\r
+    sig.replace(" : ","_mod : ");\r
+    ret = "  signal "+sig+"\n";\r
+    sig = toCtlIface->toVHDL(AbstractInterface::Signal,0);\r
+    sig.replace(" : ","_mod : ");\r
+    ret += "  signal "+sig+"\n";\r
+    QString wStr="";\r
+    wStr.setNum(toIface->getWidth());\r
+    ret += "  signal "+toName+"_dly :  vector_of_std_logic_vector"+wStr+"(0 to "+dm1+");\n";\r
+    ret += "  signal "+toCtlName+"_dly :  vector_of_std_logic(0 to "+dm1+");\n";\r
+  }\r
+\r
+  return ret;\r
+\r
 }\r
 \r
 QString DelayInputModifier::getTypeStr() {\r

diff --git a/GroupBlock.cpp b/GroupBlock.cpp
index 9a8bb0f857df75dd5843ad5069cc80aa27f852fb..66268b93e161d8bc76d0d4061b65f5f07af30e4d 100644 (file)
--- a/GroupBlock.cpp
+++ b/GroupBlock.cpp
@@ -21,8 +21,17 @@ GroupBlock::GroupBlock(GroupBlock *_parent) throw(Exception) :  AbstractBlock()
     // creating clk/rst interfaces
     clk = new GroupInterface(this,"clk", AbstractInterface::Input, AbstractInterface::Clock);
     rst = new GroupInterface(this,"reset", AbstractInterface::Input, AbstractInterface::Reset);
-    addInterface(clk);
-    addInterface(rst);    
+    addInterface(clk);    
+    addInterface(rst);
+
+    try {
+      connectClkReset();
+    }
+    catch(Exception e) {
+      AbstractBlock* source = (AbstractBlock *)(e.getSource());
+      cerr << qPrintable(source->getName()) << ":" << qPrintable(e.getMessage()) << endl;
+      throw(e);
+    }
   }
   else {
     topGroup = true;
@@ -436,33 +445,133 @@ void GroupBlock::generateArchitecture(QTextStream& out, QDomElement &elt) throw(
   out << "    SIGNALS" << endl;
   out << "  ----------------------------" << endl << endl;
 
-  out << "  -- signals from input ports of " << name << endl;
-  QList<AbstractInterface*> listInputs = getInputs();
-  foreach(AbstractInterface* iface, listInputs) {
+
+  foreach(AbstractBlock* block, blocks) {
+    try {
+      out << "  -- signals from output ports of " << block->getName() << endl;
+      QList<AbstractInterface*> listOutputs = block->getOutputs();
+      foreach(AbstractInterface* iface, listOutputs) {
+        if ((iface->getPurpose() == AbstractInterface::Data)||(iface->getPurpose() == AbstractInterface::Control)) {
+          out << "  signal " << iface->toVHDL(AbstractInterface::Signal,0) << endl;
+        }
+        else if (block->getName() == "clkrstgen") {
+          if ((iface->getPurpose() == AbstractInterface::Clock)||(iface->getPurpose() == AbstractInterface::Reset)) {
+            out << "  signal " << iface->toVHDL(AbstractInterface::Signal,0) << endl;
+          }
+        }
+      }
+    }
+    catch(Exception e) {
+      throw(e);
+    }
+    out << endl;
+  }
+  foreach(AbstractBlock* block, blocks) {
+    try {
+      out << "  -- signals for modified input ports of " << block->getName() << endl;
+      QList<AbstractInterface*> listInputs = block->getInputs();
+      foreach(AbstractInterface* iface, listInputs) {
+        if (iface->getPurpose() == AbstractInterface::Control) {
+          ConnectedInterface* connCtlIface = AI_TO_CON(iface);
+          AbstractInputModifier* modifier = connCtlIface->getInputModifier();
+          if (modifier != NULL) {
+            out << modifier->toVHDL(AbstractInputModifier::Signal,0) << endl;
+          }
+        }
+      }
+    }
+    catch(Exception e) {
+      throw(e);
+    }
+    out << endl;
+  }
+
+  out << "begin" << endl;
+
+  // generate signals that goes to the output ports
+
+  out << "  -- connections to output ports of " << name << endl;
+  QList<AbstractInterface*> listOutputs = getOutputs();
+  foreach(AbstractInterface* iface, listOutputs) {
     if ((iface->getPurpose() == AbstractInterface::Data)||(iface->getPurpose() == AbstractInterface::Control)) {
       ConnectedInterface* connIface = AI_TO_CON(iface);
-      QString prefixName = name+"_"+iface->getName()+"_TO_";
-      foreach(ConnectedInterface* toIface, connIface->getConnectedTo()) {
-        QString sigName = prefixName+toIface->getOwner()->getName()+"_"+toIface->getName();
-        out << "  signal " << sigName << " : " << iface->toVHDL(AbstractInterface::Signal,0) << endl;
-      }
+      ConnectedInterface* fromIface = connIface->getConnectedFrom();
+      out << "  " << connIface->getName() << " <= " << fromIface->toVHDL(AbstractInterface::Instance,0) << ";" << endl;
     }
   }
+
   out << endl;
+
+
+
+  // generate instances
   foreach(AbstractBlock* block, blocks) {
     try {
-      out << "  -- signals from output ports of " << block->getName() << endl;
+      out << "  " << block->getName() << "_1 : " << block->getName() << endl;
+
+      QList<BlockParameter*> listGenerics = block->getGenericParameters();
+      QList<AbstractInterface*> listInputs = block->getInputs();
       QList<AbstractInterface*> listOutputs = block->getOutputs();
-      foreach(AbstractInterface* iface, listOutputs) {
-        if ((iface->getPurpose() == AbstractInterface::Data)||(iface->getPurpose() == AbstractInterface::Control)) {
-          ConnectedInterface* connIface = AI_TO_CON(iface);
-          QString prefixName = block->getName()+"_"+iface->getName()+"_TO_";
-          foreach(ConnectedInterface* toIface, connIface->getConnectedTo()) {
-            QString sigName = prefixName+toIface->getOwner()->getName()+"_"+toIface->getName();
-            out << "  signal " << sigName << " : " << iface->toVHDL(AbstractInterface::Signal,0) << endl;
+      QList<AbstractInterface*> listBidirs = block->getBidirs();
+
+      if (!listGenerics.isEmpty()) {
+        out << "    generic map (" << endl;
+        for(i=0;i<listGenerics.size()-1;i++) {
+          out << "      " << listGenerics.at(i)->toVHDL(BlockParameter::Instance, BlockParameter::NoComma) << "," << endl;
+        }
+        out << "      " << listGenerics.at(i)->toVHDL(BlockParameter::Instance,BlockParameter::NoComma) << endl;
+        out << "    )" << endl;
+      }
+
+      out << "    port map (" << endl;
+      QString portMap = "";
+
+      for(i=0;i<listInputs.size();i++) {
+        ConnectedInterface* connIface = AI_TO_CON(listInputs.at(i));
+        ConnectedInterface* fromIface = connIface->getConnectedFrom();
+
+        if (fromIface->isFunctionalInterface()) {
+          portMap += "      " + connIface->getName() + " => ";
+          bool hasMod = false;
+          if (connIface->getPurpose() == AbstractInterface::Data) {
+            ConnectedInterface* connCtlIface = AI_TO_CON(connIface->getAssociatedIface());
+            if ((connCtlIface != NULL) && (connCtlIface->getInputModifier() != NULL)) {
+              hasMod = true;
+            }
+          }
+          else if (connIface->getPurpose() == AbstractInterface::Control) {
+            if (connIface->getInputModifier() != NULL) {
+              hasMod = true;
+            }
           }
+          if (hasMod) {
+            portMap += connIface->getOwner()->getName()+"_"+connIface->getName()+"_mod,\n";
+          }
+          else {
+            portMap += fromIface->toVHDL(AbstractInterface::Instance, AbstractInterface::NoComma) + ",\n";
+          }
+        }
+        else if (fromIface->isGroupInterface()) {
+          portMap += "      " + connIface->getName() + " => " + fromIface->getName() + ",\n";
+        }
+      }
+      if (listOutputs.size()>0) {
+        for(i=0;i<listOutputs.size();i++) {
+          ConnectedInterface* connIface = AI_TO_CON(listOutputs.at(i));
+          portMap += "      " + connIface->getName() + " => " + connIface->toVHDL(AbstractInterface::Instance, AbstractInterface::NoComma) + ",\n";
+        }
+      }
+      if (listBidirs.size()>0) {
+        for(i=0;i<listBidirs.size();i++) {
+          ConnectedInterface* connIface = AI_TO_CON(listBidirs.at(i));
+          portMap += "      " + connIface->getName() + " => " + connIface->toVHDL(AbstractInterface::Instance, AbstractInterface::NoComma) + ",\n";
         }
       }
+      portMap.chop(2);
+      out << portMap << endl;
+
+
+      out << "    );" << endl;
     }
     catch(Exception e) {
       throw(e);
@@ -470,6 +579,26 @@ void GroupBlock::generateArchitecture(QTextStream& out, QDomElement &elt) throw(
     out << endl;
   }
 
+  // generate input modifiers
+  foreach(AbstractBlock* block, blocks) {
+
+    foreach(AbstractInterface* iface, block->getControlInputs()) {
+      ConnectedInterface* connIface = AI_TO_CON(iface);
+      // check if it is connected
+      if (connIface->getConnectedFrom() == NULL) {
+        throw(Exception(IFACE_NOT_CONNECTED,this));
+      }
+      AbstractInputModifier* modifier = connIface->getInputModifier();
+      if (modifier != NULL) {
+        try {
+          out << modifier->toVHDL(AbstractInputModifier::Architecture,0) << endl;
+        }
+        catch(Exception e) {
+          throw(e);
+        }
+      }
+    }
+  }
 
   out << "end architecture rtl;" << endl;
 }

diff --git a/blast.creator.user b/blast.creator.user
index af360495099875e1b5bba8cfc0b768b79f2244fd..3d17b3dad141eb6a8a192f4b07365a2b5b08bc9b 100644 (file)
--- a/blast.creator.user
+++ b/blast.creator.user
@@ -1,10 +1,10 @@
 <?xml version="1.0" encoding="UTF-8"?>
 <!DOCTYPE QtCreatorProject>
-<!-- Written by QtCreator 4.2.0, 2018-03-27T18:47:18. -->
+<!-- Written by QtCreator 4.2.0, 2018-03-29T22:16:07. -->
 <qtcreator>
  <data>
   <variable>EnvironmentId</variable>
-  <value type="QByteArray">{3701e197-5b6c-48ea-9e98-a6cf6de18672}</value>
+  <value type="QByteArray">{c8006d66-d34f-42be-ad10-d0207752286d}</value>
  </data>
  <data>
   <variable>ProjectExplorer.Project.ActiveTarget</variable>
@@ -61,7 +61,7 @@
   <valuemap type="QVariantMap">
    <value type="QString" key="ProjectExplorer.ProjectConfiguration.DefaultDisplayName">Desktop</value>
    <value type="QString" key="ProjectExplorer.ProjectConfiguration.DisplayName">Desktop</value>
-   <value type="QString" key="ProjectExplorer.ProjectConfiguration.Id">{ed04208c-8774-456b-99b9-4a02094ca7a4}</value>
+   <value type="QString" key="ProjectExplorer.ProjectConfiguration.Id">{2c9bf876-3476-44eb-8065-1f0844704dda}</value>
    <value type="int" key="ProjectExplorer.Target.ActiveBuildConfiguration">0</value>
    <value type="int" key="ProjectExplorer.Target.ActiveDeployConfiguration">0</value>
    <value type="int" key="ProjectExplorer.Target.ActiveRunConfiguration">0</value>