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1 \relax 
2 \@writefile{toc}{\author{Sylvain Contassot-Vivier}{}}
3 \@writefile{toc}{\author{Stephane Vialle}{}}
4 \@writefile{toc}{\author{Jens Gustedt}{}}
5 \@writefile{loa}{\addvspace {10\p@ }}
6 \@writefile{toc}{\contentsline {chapter}{\numberline {3}Development methodologies for GPU and cluster of GPUs}{23}}
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9 \@writefile{toc}{\contentsline {section}{\numberline {3.1}Introduction}{24}}
10 \newlabel{ch6:intro}{{3.1}{24}}
11 \@writefile{toc}{\contentsline {section}{\numberline {3.2}General scheme of synchronous code with computation/communication overlapping in GPU clusters}{24}}
12 \newlabel{ch6:part1}{{3.2}{24}}
13 \@writefile{toc}{\contentsline {subsection}{\numberline {3.2.1}Synchronous parallel algorithms on GPU clusters}{24}}
14 \@writefile{lof}{\contentsline {figure}{\numberline {3.1}{\ignorespaces Native overlap of internode CPU communications with GPU computations.\relax }}{26}}
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16 \@writefile{toc}{\contentsline {subsection}{\numberline {3.2.2}Native overlap of CPU communications and GPU computations}{26}}
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19 \@writefile{lof}{\contentsline {figure}{\numberline {3.2}{\ignorespaces Overlap of internode CPU communications with a sequence of CPU/GPU data transfers and GPU computations.\relax }}{28}}
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21 \@writefile{toc}{\contentsline {subsection}{\numberline {3.2.3}Overlapping with sequences of transfers and computations}{28}}
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28 \@writefile{lof}{\contentsline {figure}{\numberline {3.4}{\ignorespaces Complete overlap of internode CPU communications, CPU/GPU data transfers and GPU computations, interleaving computation-communication iterations\relax }}{33}}
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30 \@writefile{toc}{\contentsline {subsection}{\numberline {3.2.4}Interleaved communications-transfers-computations overlapping}{33}}
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32 \@writefile{lol}{\contentsline {lstlisting}{\numberline {3.4}Generic scheme explicitly overlapping MPI communications, CUDA CPU/GPU transfers and CUDA GPU computations, interleaving computation-communication iterations}{34}}
33 \@writefile{toc}{\contentsline {subsection}{\numberline {3.2.5}Experimental validation}{36}}
34 \newlabel{ch6:p1expes}{{3.2.5}{36}}
35 \newlabel{ch6:p1block-cyclic}{{3.2.5}{36}}
36 \@writefile{lof}{\contentsline {figure}{\numberline {3.5}{\ignorespaces Experimental performances of different synchronous algorithms computing a dense matrix product\relax }}{37}}
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38 \@writefile{toc}{\contentsline {section}{\numberline {3.3}General scheme of asynchronous parallel code with computation/communication overlapping}{38}}
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44 \@writefile{toc}{\contentsline {subsection}{\numberline {3.3.1}A basic asynchronous scheme}{40}}
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54 \@writefile{toc}{\contentsline {subsection}{\numberline {3.3.2}Synchronization of the asynchronous scheme}{44}}
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62 \@writefile{toc}{\contentsline {subsection}{\numberline {3.3.3}Asynchronous scheme using MPI, OpenMP and CUDA}{48}}
63 \newlabel{ch6:p2GPUAsync}{{3.3.3}{48}}
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65 \@writefile{lol}{\contentsline {lstlisting}{\numberline {3.12}Computing function in the final asynchronous scheme}{50}}
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68 \newlabel{algo:ch6p2FullOverAsyncMain}{{3.14}{53}}
69 \@writefile{lol}{\contentsline {lstlisting}{\numberline {3.14}Initialization of the main process of complete overlap with asynchronism}{53}}
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73 \@writefile{lol}{\contentsline {lstlisting}{\numberline {3.16}Auxiliary computing function in the final asynchronous scheme with CPU/GPU overlap}{55}}
74 \@writefile{toc}{\contentsline {subsection}{\numberline {3.3.4}Experimental validation}{56}}
75 \newlabel{sec:ch6p2expes}{{3.3.4}{56}}
76 \@writefile{lof}{\contentsline {figure}{\numberline {3.6}{\ignorespaces Computation times of the test application in synchronous and asynchronous modes.\relax }}{57}}
77 \newlabel{fig:ch6p2syncasync}{{3.6}{57}}
78 \@writefile{lof}{\contentsline {figure}{\numberline {3.7}{\ignorespaces Computation times with or without overlap of Jacobian updatings in asynchronous mode.\relax }}{58}}
79 \newlabel{fig:ch6p2aux}{{3.7}{58}}
80 \@writefile{toc}{\contentsline {section}{\numberline {3.4}Perspective: A unifying programming model}{59}}
81 \newlabel{sec:ch6p3unify}{{3.4}{59}}
82 \@writefile{toc}{\contentsline {subsection}{\numberline {3.4.1}Resources}{59}}
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85 \@writefile{lol}{\contentsline {lstlisting}{\numberline {3.17}Declaration of ORWL resources for a block-cyclic matrix multiplication}{60}}
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88 \@writefile{toc}{\contentsline {subsection}{\numberline {3.4.3}Example: block-cyclic matrix multiplication (MM)}{61}}
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97 \@writefile{lol}{\contentsline {lstlisting}{\numberline {3.21}An iterative GPU transfer and compute operation as part of a block cyclic matrix multiplication task}{62}}
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101 \@writefile{lol}{\contentsline {lstlisting}{\numberline {3.23}Dynamic initialization of access mode and priorities}{64}}
102 \@writefile{toc}{\contentsline {subsection}{\numberline {3.4.4}Tasks and operations}{64}}
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104 \@writefile{toc}{\contentsline {section}{\numberline {3.5}Conclusion}{65}}
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106 \@writefile{toc}{\contentsline {section}{\numberline {3.6}Glossary}{65}}
107 \@writefile{toc}{\contentsline {section}{Bibliography}{66}}
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