1 @ARTICLE{ch8:Allen_1997,
2 author = "R. Allen and L. Cinque and S. Tanimoto and L. Shapiro and D. Yasuda.",
3 title = "A parallel algorithm for graph matching and its MasPar implementation",
4 journal = "IEEE Transactions on Parallel and Distributed Systems",
11 @InProceedings{ch8:Carneiro_2011,
12 author = {T. Carneiro and A. E. Muritibab and M. Negreirosc and G. A. Lima de Campos},
13 title = {A New Parallel Schema for Branch-and-Bound Algorithms Using {GPGPU}},
14 booktitle = {23rd International Symposium on Computer Architecture and High Performance Computing (SBAC-PAD)},
16 address="New York, USA",
20 @ARTICLE{ch8:Casadoa_2008,
21 author = "L. G. Casadoa and J. A. Martíneza and I. Garcíaa and E. M. T. Hendrixb.",
22 title = "Branch-and-Bound interval global optimization on shared memory multiprocessors",
23 journal = "Optimization Methods and Software",
30 @InProceedings{ch8:Fung,
31 author = {W. Fung and I. Sham and G. Yuan and T. Aamodt},
32 title = {Dynamic warp formation and scheduling for efficient {GPU} control flow},
33 booktitle = {{In MICRO '07: Proceedings of the 40th Annual IEEE/ACM International Symposium on Micro-architecture}},
36 publisher = {Washington, DC, USA}
39 @Article{ch8:Garey_1976,
40 author = {M. R. Garey and D. S. Johnson and R. Sethi},
41 title = {{The complexity of flow-shop and job-shop scheduling}},
42 journal = {Mathematics of Operations Research},
49 @Article{ch8:Gendron_1994,
50 author = {B. Gendron and T. G. Crainic},
51 title = {Parallel Branch and Bound Algorithms: Survey and Synthesis},
52 journal = {Operations Research},
59 @InProceedings{ch8:Han,
60 author = {T. Han and T. S. Abdelrahman},
61 title = {Reducing branch divergence in {GPU} programs},
62 booktitle = {{Proceedings of the Fourth Workshop on General Purpose Processing on Graphics Processing Units (GPGPU-4), ACM}},
65 publisher = {New York, USA}
68 @Article{ch8:Johnson_1954,
69 author = {S. M. Johnson},
70 title = {{Optimal two- and three-stage production schedules with setup times included}},
71 journal = {Naval Research Logistis Quarterly},
78 @BOOK{ch8:Kurzak_2010,
79 author = "J. Kurzak and D. A. Bader and J. Dongarra.",
80 title = {{Scientific Computing with Multicore and Accelerators}},
81 publisher = {{Chapman \& Hall / CRC Press}},
85 @Article{ch8:Lenstra_1978,
86 author = {J. K. Lenstra and B. J. Lageweg and A. H. G. Rinnooy Kan},
87 title = {{A general bounding scheme for the permutation flow-shop problem}},
88 journal = {Operations Research},
95 @MISC{ch8:MelabHDR_2005,
97 TITLE = "Contributions \`a la r\'esolution de probl\`emes d'optimisation combinatoire sur grilles de calcul",
98 HOWPUBLISHED = "LIFL, USTL",
101 NOTE = "Habilitation to Direct Research"
104 @ARTICLE{ch8:Taillard_1993,
105 AUTHOR ="E. Taillard",
106 TITLE ="Benchmarks for basic scheduling problems",
107 JOURNAL ="Journal of Operational Research",
116 @ARTICLE{ch8:JRJackson_1956,
117 AUTHOR ="J. R. Jackson",
118 TITLE ="An Extension of {J}ohnson's results on Job-Lot Scheduling",
119 JOURNAL ="Naval Research Logistis Quarterly",
126 @ARTICLE{ch8:LGMitten_1959,
127 AUTHOR ="L. G. Mitten",
128 TITLE ="Sequencing $n$ jobs on two machines with arbitrary time lags",
129 JOURNAL ="Management Science",
136 @InProceedings{ch8:Mezmaz_2007,
137 author = {M. Mezmaz and N. Melab and E.-G. Talbi.},
138 title = {A grid-enabled branch and bound algorithm for solving challenging combinatorial optimization problems},
139 booktitle = {{Proceedings of 21th IEEE International Parallel and Distributed Processing Symposium (IPDPS)}},
143 publisher = {Long Beach, California}
146 @ARTICLE{ch8:Quinn_1990,
147 author = "M. J. Quinn.",
148 title = "Analysis and implementation of branch-and-bound algorithms on a hypercube multicomputer",
149 journal = "IEEE Transactions on Computers",
156 @InProceedings{ch8:Zhang,
157 author = {E. Z. Zhang and Y. Jiang and Z. Guo and X. Shen},
158 title = {Streamlining {GPU} applications on the fly: {T}hread divergence elimination through runtime thread-data remapping},
159 booktitle = {{Proceedings of the 24th ACM International Conference on Supercomputing (ICS'10), ACM}},
162 publisher = {New York, NY, USA}
166 author = {{NVIDIA Corporation}},
168 title = {{NVIDIA CUDA C} {P}rogramming {G}uide, Version 4.0 },