2 \documentclass[10pt, peerreview, compsocconf]{IEEEtran}
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32 %% \author{\IEEEauthorblockN{Authors Name/s per 1st Affiliation (Author)}
33 %% \IEEEauthorblockA{line 1 (of Affiliation): dept. name of organization\\
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47 \title{A new approach based on least square methods to estimate in real time cantilevers deflection with a FPGA}
48 \author{\IEEEauthorblockN{Raphaël Couturier\IEEEauthorrefmark{1}, Stéphane Domas\IEEEauthorrefmark{1}, Gwenhaël Goavec-Merou\IEEEauthorrefmark{2} and Michel Lenczner\IEEEauthorrefmark{2}}
49 \IEEEauthorblockA{\IEEEauthorrefmark{1}FEMTO-ST, DISC, University of Franche-Comte, Belfort, France\\
50 \{raphael.couturier,stephane.domas\}@univ-fcomte.fr}
51 \IEEEauthorblockA{\IEEEauthorrefmark{2}FEMTO-ST, Time-Frequency, University of Franche-Comte, Besançon, France\\
52 \{michel.lenczner@utbm.fr,gwenhael.goavec@trabucayre.com}
66 Atomic force microscope (AFM) provides high resolution images of
67 surfaces. We focus our attention on an interferometry method to
68 estimate the cantilevers deflection. The initial method was based
69 on splines to determine the phase of interference fringes, and thus
70 the deflection. Computations were performed on a PC with LabView.
71 In this paper, we propose a new approach based on the least square
72 methods and its implementation that we developed on a FPGA, using
73 the pipelining technique. Simulations and real tests showed us that
74 this implementation is very efficient and should allow us to control
75 a cantilevers array in real time.
81 FPGA, cantilever, interferometry.
85 \IEEEpeerreviewmaketitle
87 \section{Introduction}
89 Cantilevers are used inside atomic force microscope (AFM) which provides high
90 resolution images of surfaces. Several techniques have been used to measure the
91 displacement of cantilevers in literature. For example, it is possible to
92 determine accurately the deflection with different mechanisms.
93 In~\cite{CantiPiezzo01}, authors used piezoresistor integrated into the
94 cantilever. Nevertheless this approach suffers from the complexity of the
95 microfabrication process needed to implement the sensor in the cantilever.
96 In~\cite{CantiCapacitive03}, authors have presented an cantilever mechanism
97 based on capacitive sensing. This kind of technique also involves to instrument
98 the cantilever which result in a complex fabrication process.
100 In this paper our attention is focused on a method based on interferometry to
101 measure cantilevers' displacements. In this method cantilevers are illuminated
102 by an optic source. The interferometry produces fringes on each cantilever
103 which enables to compute the cantilever displacement. In order to analyze the
104 fringes a high speed camera is used. Images need to be processed quickly and
105 then a estimation method is required to determine the displacement of each
106 cantilever. In~\cite{AFMCSEM11}, authors have used an algorithm based on
107 spline to estimate the cantilevers' positions.
109 The overall process gives accurate results but all the computations
110 are performed on a standard computer using LabView. Consequently, the
111 main drawback of this implementation is that the computer is a
112 bottleneck. In this paper we propose to use a method based on least
113 square and to implement all the computation on a FPGA.
115 The remainder of the paper is organized as follows. Section~\ref{sec:measure}
116 describes more precisely the measurement process. Our solution based on the
117 least square method and the implementation on FPGA is presented in
118 Section~\ref{sec:solus}. Experimentations are described in
119 Section~\ref{sec:results}. Finally a conclusion and some perspectives are
124 %% quelques ref commentées sur les calculs basés sur l'interférométrie
126 \section{Measurement principles}
129 \subsection{Architecture}
131 %% description de l'architecture générale de l'acquisition d'images
132 %% avec au milieu une unité de traitement dont on ne précise pas ce
135 In order to develop simple, cost effective and user-friendly cantilever arrays,
136 authors of ~\cite{AFMCSEM11} have developed a system based of
137 interferometry. In opposition to other optical based systems, using a laser beam
138 deflection scheme and sensitive to the angular displacement of the cantilever,
139 interferometry is sensitive to the optical path difference induced by the
140 vertical displacement of the cantilever.
142 The system build by these authors is based on a Linnick
143 interferometer~\cite{Sinclair:05}. It is illustrated in
144 Figure~\ref{fig:AFM}. A laser diode is first split (by the splitter)
145 into a reference beam and a sample beam that reaches the cantilever
146 array. In order to be able to move the cantilever array, it is
147 mounted on a translation and rotational hexapod stage with five
148 degrees of freedom. The optical system is also fixed to the stage.
149 Thus, the cantilever array is centered in the optical system which can
150 be adjusted accurately. The beam illuminates the array by a
151 microscope objective and the light reflects on the cantilevers.
152 Likewise the reference beam reflects on a movable mirror. A CMOS
153 camera chip records the reference and sample beams which are
154 recombined in the beam splitter and the interferogram. At the
155 beginning of each experiment, the movable mirror is fitted manually in
156 order to align the interferometric fringes approximately parallel to
157 the cantilevers. When cantilevers move due to the surface, the
158 bending of cantilevers produce movements in the fringes that can be
159 detected with the CMOS camera. Finally the fringes need to be
160 analyzed. In~\cite{AFMCSEM11}, authors used a LabView program to
161 compute the cantilevers' deflections from the fringes.
165 \includegraphics[width=\columnwidth]{AFM}
167 \caption{schema of the AFM}
172 %% image tirée des expériences.
174 \subsection{Cantilever deflection estimation}
179 \includegraphics[width=\columnwidth]{lever-xp}
181 \caption{Portion of an image picked by the camera}
185 As shown on image \ref{fig:img-xp}, each cantilever is covered by
186 several interferometric fringes. The fringes will distort when
187 cantilevers are deflected. Estimating the deflection is done by
188 computing this distortion. For that, authors of \cite{AFMCSEM11}
189 proposed a method based on computing the phase of the fringes, at the
190 base of each cantilever, near the tip, and on the base of the
191 array. They assume that a linear relation binds these phases, which
192 can be use to "unwrap" the phase at the tip and to determine the deflection.\\
194 More precisely, segment of pixels are extracted from images taken by
195 the camera. These segments are large enough to cover several
196 interferometric fringes. As said above, they are placed at the base
197 and near the tip of the cantilevers. They are called base profile and
198 tip profile in the following. Furthermore, a reference profile is
199 taken on the base of the cantilever array.
201 The pixels intensity $I$ (in gray level) of each profile is modelized by:
205 I(x) = ax+b+A.cos(2\pi f.x + \theta)
208 where $x$ is the position of a pixel in its associated segment.
210 The global method consists in two main sequences. The first one aims
211 to determine the frequency $f$ of each profile with an algorithm based
212 on spline interpolation (see section \ref{algo-spline}). It also
213 computes the coefficient used for unwrapping the phase. The second one
214 is the acquisition loop, while which images are taken at regular time
215 steps. For each image, the phase $\theta$ of all profiles is computed
216 to obtain, after unwrapping, the deflection of
217 cantilevers. Originally, this computation was also done with an
218 algorithm based on spline. This article proposes a new version based
219 on a least square method.
221 \subsection{Design goals}
224 The main goal is to implement a computing unit to estimate the
225 deflection of about $10\times10$ cantilevers, faster than the stream of
226 images coming from the camera. The accuracy of results must be close
227 to the maximum precision ever obtained experimentally on the
228 architecture, i.e. 0.3nm. Finally, the latency between an image
229 entering in the unit and the deflections must be as small as possible
230 (NB: future works plan to add some control on the cantilevers).\\
232 If we put aside some hardware issues like the speed of the link
233 between the camera and the computation unit, the time to deserialize
234 pixels and to store them in memory, ... the phase computation is
235 obviously the bottle-neck of the whole process. For example, if we
236 consider the camera actually in use, an exposition time of 2.5ms for
237 $1024\times 1204$ pixels seems the minimum that can be reached. For
238 100 cantilevers, if we neglect the time to extract pixels, it implies
239 that computing the deflection of a single
240 cantilever should take less than 25$\mu$s, thus 12.5$\mu$s by phase.\\
242 In fact, this timing is a very hard constraint. Let consider a very
243 small program that initializes twenty million of doubles in memory
244 and then does 1000000 cumulated sums on 20 contiguous values
245 (experimental profiles have about this size). On an intel Core 2 Duo
246 E6650 at 2.33GHz, this program reaches an average of 155Mflops.
248 %%Itimplies that the phase computation algorithm should not take more than
249 %%$155\times 12.5 = 1937$ floating operations. For integers, it gives $3000$ operations.
251 Obviously, some cache effects and optimizations on
252 huge amount of computations can drastically increase these
253 performances: peak efficiency is about 2.5Gflops for the considered
254 CPU. But this is not the case for phase computation that used only few
257 In order to evaluate the original algorithm, we translated it in C
258 language. As said further, for 20 pixels, it does about 1550
259 operations, thus an estimated execution time of $1550/155
260 =$10$\mu$s. For a more realistic evaluation, we constructed a file of
261 1Mo containing 200 profiles of 20 pixels, equally scattered. This file
262 is equivalent to an image stored in a device file representing the
263 camera. We obtained an average of 10.5$\mu$s by profile (including I/O
264 accesses). It is under are requirements but close to the limit. In
265 case of an occasional load of the system, it could be largely
266 overtaken. A solution would be to use a real-time operating system but
267 another one to search for a more efficient algorithm.
269 But the main drawback is the latency of such a solution: since each
270 profile must be treated one after another, the deflection of 100
271 cantilevers takes about $200\times 10.5 = 2.1$ms, which is inadequate
272 for an efficient control. An obvious solution is to parallelize the
273 computations, for example on a GPU. Nevertheless, the cost to transfer
274 profile in GPU memory and to take back results would be prohibitive
275 compared to computation time. It is certainly more efficient to
276 pipeline the computation. For example, supposing that 200 profiles of
277 20 pixels can be pushed sequentially in the pipelined unit cadenced at
278 a 100MHz (i.e. a pixel enters in the unit each 10ns), all profiles
279 would be treated in $200\times 20\times 10.10^{-9} =$ 40$\mu$s plus
280 the latency of the pipeline. This is about 500 times faster than
283 For these reasons, an FPGA as the computation unit is the best choice
284 to achieve the required performance. Nevertheless, passing from
285 a C code to a pipelined version in VHDL is not obvious at all. As
286 explained in the next section, it can even be impossible because of
287 some hardware constraints specific to FPGAs.
290 \section{Proposed solution}
293 Project Oscar aims to provide a hardware and software architecture to estimate
294 and control the deflection of cantilevers. The hardware part consists in a
295 high-speed camera, linked on an embedded board hosting FPGAs. By the way, the
296 camera output stream can be pushed directly into the FPGA. The software part is
297 mostly the VHDL code that deserializes the camera stream, extracts profile and
298 computes the deflection. Before focusing on our work to implement the phase
299 computation, we give some general information about FPGAs and the board we use.
303 A field-programmable gate array (FPGA) is an integrated circuit designed to be
304 configured by the customer. FGPAs are composed of programmable logic components,
305 called configurable logic blocks (CLB). These blocks mainly contains look-up
306 tables (LUT), flip/flops (F/F) and latches, organized in one or more slices
307 connected together. Each CLB can be configured to perform simple (AND, XOR, ...)
308 or complex combinational functions. They are interconnected by reconfigurable
309 links. Modern FPGAs contain memory elements and multipliers which enable to
310 simplify the design and to increase the performance. Nevertheless, all other
311 complex operations, like division, trigonometric functions, $\ldots$ are not
312 available and must be done by configuring a set of CLBs. Since this
313 configuration is not obvious at all, it can be done via a framework, like
314 ISE~\cite{ISE}. Such a software can synthetize a design written in a hardware
315 description language (HDL), map it onto CLBs, place/route them for a specific
316 FPGA, and finally produce a bitstream that is used to configure the FPGA. Thus,
317 from the developer point of view, the main difficulty is to translate an
318 algorithm in HDL code, taking account FPGA resources and constraints like clock
319 signals and I/O values that drive the FPGA.
321 Indeed, HDL programming is very different from classic languages like
322 C. A program can be seen as a state-machine, manipulating signals that
323 evolve from state to state. By the way, HDL instructions can execute
324 concurrently. Basic logic operations are used to aggregate signals to
325 produce new states and assign it to another signal. States are mainly
326 expressed as arrays of bits. Fortunately, libraries propose some
327 higher levels representations like signed integers, and arithmetic
330 Furthermore, even if FPGAs are cadenced more slowly than classic
331 processors, they can perform pipeline as well as parallel
332 operations. A pipeline consists in cutting a process in sequence of
333 small tasks, taking the same execution time. It accepts a new data at
334 each clock top, thus, after a known latency, it also provides a result
335 at each clock top. However, using a pipeline consumes more logics
336 since the components of a task are not reusable by another
337 one. Nevertheless it is probably the most efficient technique on
338 FPGA. Because of its architecture, it is also very easy to process
339 several data concurrently. When it is possible, the best performance
340 is reached using parallelism to handle simultaneously several
341 pipelines in order to handle multiple data streams.
343 \subsection{The board}
345 The board we use is designed by the Armadeus company, under the name
346 SP Vision. It consists in a development board hosting a i.MX27 ARM
347 processor (from Freescale). The board includes all classical
348 connectors: USB, Ethernet, ... A Flash memory contains a Linux kernel
349 that can be launched after booting the board via u-Boot.
351 The processor is directly connected to a Spartan3A FPGA (from Xilinx)
352 via its special interface called WEIM. The Spartan3A is itself
353 connected to a Spartan6 FPGA. Thus, it is possible to develop programs
354 that communicate between i.MX and Spartan6, using Spartan3 as a
355 tunnel. By default, the WEIM interface provides a clock signal at
356 100MHz that is connected to dedicated FPGA pins.
358 The Spartan6 is an LX100 version. It has 15822 slices, each slice
359 containing 4 LUTs and 8 flip/flops. It is equivalent to 101261 logic
360 cells. There are 268 internal block RAM of 18Kbits, and 180 dedicated
361 multiply-adders (named DSP48), which is largely enough for our
364 Some I/O pins of Spartan6 are connected to two $2\times 17$ headers
365 that can be used as user wants. For the project, they will be
366 connected to the interface card of the camera.
368 \subsection{Considered algorithms}
370 Two solutions have been studied to achieve phase computation. The
371 original one, proposed by A. Meister and M. Favre, is based on
372 interpolation by splines. It allows to compute frequency and
373 phase. The second one, detailed in this article, is based on a
374 classical least square method but suppose that frequency is already
377 \subsubsection{Spline algorithm (SPL)}
378 \label{sec:algo-spline}
379 Let consider a profile $P$, that is a segment of $M$ pixels with an
380 intensity in gray levels. Let call $I(x)$ the intensity of profile in $x
383 At first, only $M$ values of $I$ are known, for $x = 0, 1,
384 \ldots,M-1$. A normalization allows to scale known intensities into
385 $[-1,1]$. We compute splines that fit at best these normalized
386 intensities. Splines are used to interpolate $N = k\times M$ points
387 (typically $k=4$ is sufficient), within $[0,M[$. Let call $x^s$ the
388 coordinates of these $N$ points and $I^s$ their intensities.
390 In order to have the frequency, the mean line $a.x+b$ (see equation \ref{equ:profile}) of $I^s$ is
391 computed. Finding intersections of $I^s$ and this line allow to obtain
392 the period thus the frequency.
394 The phase is computed via the equation:
396 \theta = atan \left[ \frac{\sum_{i=0}^{N-1} sin(2\pi f x^s_i) \times I^s(x^s_i)}{\sum_{i=0}^{N-1} cos(2\pi f x^s_i) \times I^s(x^s_i)} \right]
399 Two things can be noticed:
401 \item the frequency could also be obtained using the derivates of
402 spline equations, which only implies to solve quadratic equations.
403 \item frequency of each profile is computed a single time, before the
404 acquisition loop. Thus, $sin(2\pi f x^s_i)$ and $cos(2\pi f x^s_i)$
405 could also be computed before the loop, which leads to a much faster
406 computation of $\theta$.
409 \subsubsection{Least square algorithm (LSQ)}
411 Assuming that we compute the phase during the acquisition loop,
412 equation \ref{equ:profile} has only 4 parameters: $a, b, A$, and
413 $\theta$, $f$ and $x$ being already known. Since $I$ is non-linear, a
414 least square method based on a Gauss-newton algorithm can be used to
415 determine these four parameters. Since it is an iterative process
416 ending with a convergence criterion, it is obvious that it is not
417 particularly adapted to our design goals.
419 Fortunately, it is quite simple to reduce the number of parameters to
420 only $\theta$. Let $x^p$ be the coordinates of pixels in a segment of
421 size $M$. Thus, $x^p = 0, 1, \ldots, M-1$. Let $I(x^p)$ be their
422 intensity. Firstly, we "remove" the slope by computing:
424 \[I^{corr}(x^p) = I(x^p) - a.x^p - b\]
426 Since linear equation coefficients are searched, a classical least
427 square method can be used to determine $a$ and $b$:
429 \[a = \frac{covar(x^p,I(x^p))}{var(x^p)} \]
431 Assuming an overlined symbol means an average, then:
433 \[b = \overline{I(x^p)} - a.\overline{{x^p}}\]
435 Let $A$ be the amplitude of $I^{corr}$, i.e.
437 \[A = \frac{max(I^{corr}) - min(I^{corr})}{2}\]
439 Then, the least square method to find $\theta$ is reduced to search the minimum of:
441 \[\sum_{i=0}^{M-1} \left[ cos(2\pi f.i + \theta) - \frac{I^{corr}(i)}{A} \right]^2\]
443 It is equivalent to derivate this expression and to solve the following equation:
446 2\left[ cos\theta \sum_{i=0}^{M-1} I^{corr}(i).sin(2\pi f.i) + sin\theta \sum_{i=0}^{M-1} I^{corr}(i).cos(2\pi f.i)\right] \\
447 - A\left[ cos2\theta \sum_{i=0}^{M-1} sin(4\pi f.i) + sin2\theta \sum_{i=0}^{M-1} cos(4\pi f.i)\right] = 0
450 Several points can be noticed:
452 \item As in the spline method, some parts of this equation can be
453 computed before the acquisition loop. It is the case of sums that do
454 not depend on $\theta$:
456 \[ \sum_{i=0}^{M-1} sin(4\pi f.i), \sum_{i=0}^{M-1} cos(4\pi f.i) \]
458 \item Lookup tables for $sin(2\pi f.i)$ and $cos(2\pi f.i)$ can also be
461 \item The simplest method to find the good $\theta$ is to discretize
462 $[-\pi,\pi]$ in $nb_s$ steps, and to search which step leads to the
463 result closest to zero. By the way, three other lookup tables can
464 also be computed before the loop:
466 \[ sin \theta, cos \theta, \]
468 \[ \left[ cos 2\theta \sum_{i=0}^{M-1} sin(4\pi f.i) + sin 2\theta \sum_{i=0}^{M-1} cos(4\pi f.i)\right] \]
470 \item This search can be very fast using a dichotomous process in $log_2(nb_s)$
474 Finally, the whole summarizes in an algorithm (called LSQ in the following) in two parts, one before and one during the acquisition loop:
475 \begin{algorithm}[htbp]
476 \caption{LSQ algorithm - before acquisition loop.}
477 \label{alg:lsq-before}
479 $M \leftarrow $ number of pixels of the profile\\
480 I[] $\leftarrow $ intensities of pixels\\
481 $f \leftarrow $ frequency of the profile\\
482 $s4i \leftarrow \sum_{i=0}^{M-1} sin(4\pi f.i)$\\
483 $c4i \leftarrow \sum_{i=0}^{M-1} cos(4\pi f.i)$\\
484 $nb_s \leftarrow $ number of discretization steps of $[-\pi,\pi]$\\
486 \For{$i=0$ to $nb_s $}{
487 $\theta \leftarrow -\pi + 2\pi\times \frac{i}{nb_s}$\\
488 lut$_s$[$i$] $\leftarrow sin \theta$\\
489 lut$_c$[$i$] $\leftarrow cos \theta$\\
490 lut$_A$[$i$] $\leftarrow cos 2 \theta \times s4i + sin 2 \theta \times c4i$\\
491 lut$_{sfi}$[$i$] $\leftarrow sin (2\pi f.i)$\\
492 lut$_{cfi}$[$i$] $\leftarrow cos (2\pi f.i)$\\
496 \begin{algorithm}[htbp]
497 \caption{LSQ algorithm - during acquisition loop.}
498 \label{alg:lsq-during}
500 $\bar{x} \leftarrow \frac{M-1}{2}$\\
501 $\bar{y} \leftarrow 0$, $x_{var} \leftarrow 0$, $xy_{covar} \leftarrow 0$\\
502 \For{$i=0$ to $M-1$}{
503 $\bar{y} \leftarrow \bar{y} + $ I[$i$]\\
504 $x_{var} \leftarrow x_{var} + (i-\bar{x})^2$\\
506 $\bar{y} \leftarrow \frac{\bar{y}}{M}$\\
507 \For{$i=0$ to $M-1$}{
508 $xy_{covar} \leftarrow xy_{covar} + (i-\bar{x}) \times (I[i]-\bar{y})$\\
510 $slope \leftarrow \frac{xy_{covar}}{x_{var}}$\\
511 $start \leftarrow y_{moy} - slope\times \bar{x}$\\
512 \For{$i=0$ to $M-1$}{
513 $I[i] \leftarrow I[i] - start - slope\times i$\\
516 $I_{max} \leftarrow max_i(I[i])$, $I_{min} \leftarrow min_i(I[i])$\\
517 $amp \leftarrow \frac{I_{max}-I_{min}}{2}$\\
519 $Is \leftarrow 0$, $Ic \leftarrow 0$\\
520 \For{$i=0$ to $M-1$}{
521 $Is \leftarrow Is + I[i]\times $ lut$_{sfi}$[$i$]\\
522 $Ic \leftarrow Ic + I[i]\times $ lut$_{cfi}$[$i$]\\
525 $\delta \leftarrow \frac{nb_s}{2}$, $b_l \leftarrow 0$, $b_r \leftarrow \delta$\\
526 $v_l \leftarrow -2.I_s - amp.$lut$_A$[$b_l$]\\
528 \While{$\delta >= 1$}{
530 $v_r \leftarrow 2.[ Is.$lut$_c$[$b_r$]$ + Ic.$lut$_s$[$b_r$]$ ] - amp.$lut$_A$[$b_r$]\\
532 \If{$!(v_l < 0$ and $v_r >= 0)$}{
533 $v_l \leftarrow v_r$ \\
534 $b_l \leftarrow b_r$ \\
536 $\delta \leftarrow \frac{\delta}{2}$\\
537 $b_r \leftarrow b_l + \delta$\\
539 \uIf{$!(v_l < 0$ and $v_r >= 0)$}{
540 $v_l \leftarrow v_r$ \\
541 $b_l \leftarrow b_r$ \\
542 $b_r \leftarrow b_l + 1$\\
543 $v_r \leftarrow 2.[ Is.$lut$_c$[$b_r$]$ + Ic.$lut$_s$[$b_r$]$ ] - amp.$lut$_A$[$b_r$]\\
546 $b_r \leftarrow b_l + 1$\\
549 \uIf{$ abs(v_l) < v_r$}{
550 $b_{\theta} \leftarrow b_l$ \\
553 $b_{\theta} \leftarrow b_r$ \\
555 $\theta \leftarrow \pi\times \left[\frac{2.b_{ref}}{nb_s}-1\right]$\\
559 \subsubsection{Comparison}
561 We compared the two algorithms on the base of three criteria:
563 \item precision of results on a cosines profile, distorted with noise,
564 \item number of operations,
565 \item complexity to implement an FPGA version.
568 For the first item, we produced a matlab version of each algorithm,
569 running with double precision values. The profile was generated for
570 about 34000 different values of period ($\in [3.1, 6.1]$, step = 0.1),
571 phase ($\in [-3.1 , 3.1]$, step = 0.062) and slope ($\in [-2 , 2]$,
572 step = 0.4). For LSQ, $nb_s = 1024$, which leads to a maximal error of
573 $\frac{\pi}{1024}$ on phase computation. Current A. Meister and
574 M. Favre experiments show a ratio of 50 between variation of phase and
575 the deflection of a lever. Thus, the maximal error due to
576 discretization correspond to an error of 0.15nm on the lever
577 deflection, which is smaller than the best precision they achieved,
580 For each test, we add some noise to the profile: each group of two
581 pixels has its intensity added to a random number picked in $[-N,N]$
582 (NB: it should be noticed that picking a new value for each pixel does
583 not distort enough the profile). The absolute error on the result is
584 evaluated by comparing the difference between the reference and
585 computed phase, out of $2\pi$, expressed in percents. That is: $err =
586 100\times \frac{|\theta_{ref} - \theta_{comp}|}{2\pi}$.
588 Table \ref{tab:algo_prec} gives the maximum and average error for the two algorithms and increasing values of $N$.
592 \begin{tabular}{|c|c|c|c|c|}
594 & \multicolumn{2}{c|}{SPL} & \multicolumn{2}{c|}{LSQ} \\ \cline{2-5}
595 noise & max. err. & aver. err. & max. err. & aver. err. \\ \hline
596 0 & 2.46 & 0.58 & 0.49 & 0.1 \\ \hline
597 2.5 & 2.75 & 0.62 & 1.16 & 0.22 \\ \hline
598 5 & 3.77 & 0.72 & 2.47 & 0.41 \\ \hline
599 7.5 & 4.72 & 0.86 & 3.33 & 0.62 \\ \hline
600 10 & 5.62 & 1.03 & 4.29 & 0.81 \\ \hline
601 15 & 7.96 & 1.38 & 6.35 & 1.21 \\ \hline
602 30 & 17.06 & 2.6 & 13.94 & 2.45 \\ \hline
605 \caption{Error (in \%) for cosines profiles, with noise.}
606 \label{tab:algo_prec}
610 These results show that the two algorithms are very close, with a
611 slight advantage for LSQ. Furthermore, both behave very well against
612 noise. Assuming the experimental ratio of 50 (see above), an error of
613 1 percent on phase correspond to an error of 0.5nm on the lever
614 deflection, which is very close to the best precision.
616 Obviously, it is very hard to predict which level of noise will be
617 present in real experiments and how it will distort the
618 profiles. Nevertheless, we can see on figure \ref{fig:noise20} the
619 profile with $N=10$ that leads to the biggest error. It is a bit
620 distorted, with pikes and straight/rounded portions, and relatively
621 close to most of that come from experiments. Figure \ref{fig:noise60}
622 shows a sample of worst profile for $N=30$. It is completely distorted,
623 largely beyond the worst experimental ones.
627 \includegraphics[width=\columnwidth]{intens-noise20}
629 \caption{Sample of worst profile for N=10}
635 \includegraphics[width=\columnwidth]{intens-noise60}
637 \caption{Sample of worst profile for N=30}
641 The second criterion is relatively easy to estimate for LSQ and harder
642 for SPL because of $atan$ operation. In both cases, it is proportional
643 to numbers of pixels $M$. For LSQ, it also depends on $nb_s$ and for
644 SPL on $N = k\times M$, i.e. the number of interpolated points.
646 We assume that $M=20$, $nb_s=1024$, $k=4$, all possible parts are
647 already in lookup tables and a limited set of operations (+, -, *, /,
648 $<$, $>$) is taken account. Translating the two algorithms in C code, we
649 obtain about 430 operations for LSQ and 1550 (plus few tenth for
650 $atan$) for SPL. This result is largely in favor of LSQ. Nevertheless,
651 considering the total number of operations is not really pertinent for
652 an FPGA implementation: it mainly depends on the type of operations
654 ordering. The final decision is thus driven by the third criterion.\\
656 The Spartan 6 used in our architecture has a hard constraint: it has no built-in
657 floating point units. Obviously, it is possible to use some existing
658 "black-boxes" for double precision operations. But they have a quite long
659 latency. It is much simpler to exclusively use integers, with a quantization of
660 all double precision values. Obviously, this quantization should not decrease
661 too much the precision of results. Furthermore, it should not lead to a design
662 with a huge latency because of operations that could not complete during a
663 single or few clock cycles. Divisions are in this case and, moreover, they need
664 a varying number of clock cycles to complete. Even multiplications can be a
665 problem: DSP48 take inputs of 18 bits maximum. For larger multiplications,
666 several DSP must be combined, increasing the latency.
668 Nevertheless, the hardest constraint does not come from the FPGA characteristics
669 but from the algorithms. Their VHDL implementation will be efficient only if they
670 can be fully (or near) pipelined. By the way, the choice is quickly done: only a
671 small part of SPL can be. Indeed, the computation of spline coefficients
672 implies to solve a tridiagonal system $A.m = b$. Values in $A$ and $b$ can be
673 computed from incoming pixels intensity but after, the back-solve starts with
674 the latest values, which breaks the pipeline. Moreover, SPL relies on
675 interpolating far more points than profile size. Thus, the end of SPL works on a
676 larger amount of data than the beginning, which also breaks the pipeline.
678 LSQ has not this problem: all parts except the dichotomial search work on the
679 same amount of data, i.e. the profile size. Furthermore, LSQ needs less
680 operations than SPL, implying a smaller output latency. Consequently, it is the
681 best candidate for phase computation. Nevertheless, obtaining a fully pipelined
682 version supposes that operations of different parts complete in a single clock
683 cycle. It is the case for simulations but it completely fails when mapping and
684 routing the design on the Spartan6. By the way, extra-latency is generated and
685 there must be idle times between two profiles entering into the pipeline.
687 %%Before obtaining the least bitstream, the crucial question is: how to
688 %%translate the C code the LSQ into VHDL ?
691 %\subsection{VHDL design paradigms}
693 \section{Experimental tests}
695 In this section we explain what we have done yet. Until now, we could not perform
696 real experiments since we just have received the FGPA board. Nevertheless, we
697 will include real experiments in the final version of this paper.
699 \subsection{VHDL implementation}
701 From the LSQ algorithm, we have written a C program that uses only
702 integer values. We use a very simple quantization by multiplying
703 double precision values by a power of two, keeping the integer
704 part. For example, all values stored in lut$_s$, lut$_c$, $\ldots$ are
705 scaled by 1024. Since LSQ also computes average, variance, ... to
706 remove the slope, the result of implied Euclidean divisions may be
707 relatively wrong. To avoid that, we also scale the pixel intensities
708 by a power of two. Furthermore, assuming $nb_s$ is fixed, these
709 divisions have a known denominator. Thus, they can be replaced by
710 their multiplication/shift counterpart. Finally, all other
711 multiplications or divisions by a power of two have been replaced by
712 left or right bit shifts. By the way, the code only contains
713 additions, subtractions and multiplications of signed integers, which
714 is perfectly adapted to FGPAs.
716 As said above, hardware constraints have a great influence on the VHDL
717 implementation. Consequently, we searched the maximum value of each
718 variable as a function of the different scale factors and the size of
719 profiles, which gives their maximum size in bits. That size determines
720 the maximum scale factors that allow to use the least possible RAMs
721 and DSPs. Actually, we implemented our algorithm with this maximum
722 size but current works study the impact of quantization on the results
723 precision and design complexity. We have compared the result of the
724 LSQ version using integers and doubles and observed that the precision
725 of both were similar.
727 Then we built two versions of VHDL codes: one directly by hand coding
728 and the other with Matlab using the Simulink HDL coder
729 feature~\cite{HDLCoder}. Although the approach is completely different
730 we obtained VHDL codes that are quite comparable. Each approach has
731 advantages and drawbacks. Roughly speaking, hand coding provides
732 beautiful and much better structured code while Simulink allows to
733 produce a code faster. In terms of throughput and latency,
734 simulations shows that the two approaches are close with a slight
735 advantage for hand coding. We hope that real experiments will confirm
738 \subsection{Simulation}
740 Before experimental tests on the board, we simulated our two VHDL
741 codes with GHDL and GTKWave (two free tools with linux). For that, we
742 build a testbench based on profiles taken from experimentations and
743 compare the results to values given by the SPL algorithm. Both
744 versions lead to correct results.
746 Our first code were highly optimized : the pipeline could compute a
747 new phase each 33 cycles and its latency was equal to 95 cycles. Since
748 the Spartan6 is clocked at 100MHz, it implies that estimating the
749 deflection of 100 cantilevers would take about $(95 + 200\times 33).10
750 = 66.95\mu$s, i.e. nearly 15000 estimations by second.
752 \subsection{Bitstream creation}
754 In order to test our code on the SP Vision board, the design was
755 extended with a component that keeps profiles in RAM, flushes them in
756 the phase computation component and stores its output in another
757 RAM. We also added a wishbone : a component that can "drive" signals
758 to communicate between i.MX and others components. It is mainly used
759 to start to flush profiles and to retrieve the computed phases in RAM.
761 Unfortunately, the first designs could not be placed and route with ISE
762 on the Spartan6 with a 100MHz clock. The main problems came from
763 routing values from RAMs to DSPs and obtaining a result under 10ns. By
764 the way, we needed to decompose some parts of the pipeline, which adds
765 some cycles. For example, some delays have been introduced between
766 RAMs output and DSPs. Finally, we obtained a bitstream that has a
767 latency of 112 cycles and computes a new phase every 40 cycles. For
768 100 cantilevers, it takes $(112 + 200\times 40).10 = 81.12\mu$s to
769 compute their deflection.
771 This bitstream has been successfully tested on the board TODAY ! YEAAHHHHH
780 \section{Conclusion and perspectives}
781 In this paper we have presented a new method to estimate the
782 cantilevers deflection in an AFM. This method is based on least
783 square methods. We have used quantization to produce an algorithm
784 based exclusively on integer values, which is adapted to a FPGA
785 implementation. We obtained a precision on results similar to the
786 initial version based on splines. Our solution has been implemented
787 with a pipeline technique. Consequently, it enables to handle a new
788 profile image very quickly. Currently we have performed simulations
789 and real tests on a Spartan6 FPGA.
791 In future work, we plan to study the quantization. Then we want to couple our
792 algorithm with a high speed camera and we plan to control the whole AFM system.
794 \bibliographystyle{plain}
795 \bibliography{biblio}