\section{Introduction}
\label{sec.intro}
-Modern processors continue increasing in a performance.
-The CPUs constructors are competing to achieve maximum number
+Modern processors continue increasing in performance,
+the CPUs constructors are competing to achieve maximum number
of floating point operations per second (FLOPS).
Thus, the energy consumption and the heat dissipation are increased
drastically according to this increase. Because the number of FLOPS
-is linearly related to the power consumption of a CPU
+is more related to the power consumption of a CPU
~\cite{Luley_Energy.efficiency.evaluation.and.benchmarking}.
-As an example of the more power hungry cluster, Tianhe-2 became in
+As an example of the most power hungry cluster, Tianhe-2 became in
the top of the Top500 list in June 2014 \cite{TOP500_Supercomputers_Sites}.
It has more than 3 millions of cores and consumed more than 17.8 megawatts.
Moreover, according to the U.S. annual energy outlook 2014
influences. Therefore, a green computing clusters with maximum number of
FLOPS per watt are required nowadays. For example, the GSIC center of Tokyo,
became the top of the Green500 list in June 2014 \cite{Green500_List}.
-This platform has more than four thousand of MFLOPS per watt. Dynamic
+This heterogeneous platform has more than four thousand of MFLOPS per watt. Dynamic
voltage and frequency scaling (DVFS) is a process used widely to reduce the energy
-consumption of the processor. In a heterogeneous clusters enabled DVFS, many researchers
+consumption of the processor. In heterogeneous clusters enabled DVFS, many researchers
used DVFS in a different ways. DVFS can be minimized the energy consumption
-but it leads to a disadvantage due to increase in performance degradation.
+but it leads to a disadvantage due to the increase in performance degradation.
Therefore, researchers used different optimization strategies to overcame
this problem. The best tradeoff relation between the energy reduction and
performance degradation ratio is became a key challenges in a heterogeneous
\label{sec.relwork}
Energy reduction process for a high performance clusters recently performed using
dynamic voltage and frequency scaling (DVFS) technique. DVFS is a technique enabled
-in a modern processors to scaled down both of the voltage and the frequency of
+in a modern processors to scaled down both of the voltage and the frequency of
the CPU while it is in the computing mode to reduce the energy consumption. DVFS is
also allowed in the graphical processors GPUs, to achieved the same goal. Applying
DVFS has a dramatical side effect if it is applied to minimum levels to gain more
iterative application. Greedy dynamic approach used by Chen et al.~\cite{Chen_DVFS.under.quality.of.service.requirements},
minimized the power consumption of a heterogeneous severs with time/space complexity, this approach
had considerable overhead. In our proposed scaling algorithm has very small overhead and
-it is works without any previous analysis for the application time complexity.
+it is works without any previous analysis for the application time complexity. The primary
+contributions of our paper are :
+\begin{enumerate}
+\item It is presents a new online heterogeneous scaling algorithm which has very small
+ overhead and not need for any training and profiling.
+\item It is develops a new energy model for iterative distributed applications running over
+ a heterogeneous clusters, taking into account the communication and slack times.
+\item The proposed scaling algorithm predicts both the energy and the execution time
+ of the iterative application.
+\item It demonstrates a new optimization function which maximize the performance and
+ minimize the energy consumption simultaneously.
+
+\end{enumerate}
\section{The performance and energy consumption measurements on heterogeneous architecture}
\label{sec.exe}
power (FLOPS), energy consumption, CPU's frequency range, \dots{} but they all
have the same network bandwidth and latency.
-The overall execution time of a distributed iterative synchronous application
+The overall execution time of a distributed iterative synchronous application
over a heterogeneous platform consists of the sum of the computation time and
the communication time for every iteration on a node. However, due to the
heterogeneous computation power of the computing nodes, slack times might occur
when fast nodes have to wait, during synchronous communications, for the slower
-nodes to finish their computations (see Figure~(\ref{fig:heter}).
+nodes to finish their computations (see Figure~(\ref{fig:heter})).
Therefore, the overall execution time of the program is the execution time of the slowest
task which have the highest computation time and no slack time.
equal to the execution time of one iteration as in EQ(\ref{eq:perf}) multiplied
by the number of iterations of that application.
-This prediction model is based on our model for predicting the execution time of
+This prediction model is developed from our model for predicting the execution time of
message passing distributed applications for homogeneous architectures~\cite{Our_first_paper}.
The execution time prediction model is used in our method for optimizing both
energy consumption and performance of iterative methods, which is presented in the
Rizvandi_Some.Observations.on.Optimal.Frequency} divide the power consumed by a processor into
two power metrics: the static and the dynamic power. While the first one is
consumed as long as the computing unit is turned on, the latter is only consumed during
-computation times. The dynamic power $P_{d}$ is related to the switching
+computation times. The dynamic power $Pd$ is related to the switching
activity $\alpha$, load capacitance $C_L$, the supply voltage $V$ and
operational frequency $F$, as shown in EQ(\ref{eq:pd}).
\begin{equation}
\label{eq:pd}
- P_\textit{d} = \alpha \cdot C_L \cdot V^2 \cdot F
+ Pd = \alpha \cdot C_L \cdot V^2 \cdot F
\end{equation}
The static power $P_{s}$ captures the leakage power as follows:
\begin{equation}
\label{eq:ps}
- P_\textit{s} = V \cdot N_{trans} \cdot K_{design} \cdot I_{leak}
+ Ps = V \cdot N_{trans} \cdot K_{design} \cdot I_{leak}
\end{equation}
where V is the supply voltage, $N_{trans}$ is the number of transistors,
$K_{design}$ is a design dependent parameter and $I_{leak}$ is a
to execute a given program can be computed as:
\begin{equation}
\label{eq:eind}
- E_\textit{ind} = P_\textit{d} \cdot Tcp + P_\textit{s} \cdot T
+ E_\textit{ind} = Pd \cdot Tcp + Ps \cdot T
\end{equation}
-where $T$ is the execution time of the program, $T_{cp}$ is the computation
-time and $T_{cp} \leq T$. $T_{cp}$ may be equal to $T$ if there is no
+where $T$ is the execution time of the program, $Tcp$ is the computation
+time and $Tcp \leq T$. $Tcp$ may be equal to $T$ if there is no
communication and no slack time.
The main objective of DVFS operation is to reduce the overall energy consumption~\cite{Le_DVFS.Laws.of.Diminishing.Returns}.
constant $\beta$. This equation is used to study the change of the dynamic
voltage with respect to various frequency values in~\cite{Rauber_Analytical.Modeling.for.Energy}. The reduction
process of the frequency can be expressed by the scaling factor $S$ which is the
-ratio between the maximum and the new frequency as in EQ~(\ref{eq:s}).
+ratio between the maximum and the new frequency as in EQ(\ref{eq:s}).
The CPU governors are power schemes supplied by the operating
system's kernel to lower a core's frequency. we can calculate the new frequency
$F_{new}$ from EQ(\ref{eq:s}) as follow:
The static energy of a processor after scaling its frequency is computed as follows:
\begin{equation}
\label{eq:Estatic}
- E_\textit{s} = P_\textit{s} \cdot (Tcp \cdot S + Tcm)
+ E_\textit{s} = Ps \cdot (Tcp \cdot S + Tcm)
\end{equation}
In the considered heterogeneous platform, each processor $i$ might have different dynamic and
The heterogeneous platform had up to 144 nodes and had nodes from the four types in equal proportions,
for example if a benchmark was executed on 8 nodes, 2 nodes from each type were used. Since the constructors
of CPUs do not specify the dynamic and the static power of their CPUs, for each type of node they were
-chosen proportionally to its computing power (FLOPS). In the initial heterogeneous platform, while computing
+chosen proportionally to its computing power (FLOPS). In the initial heterogeneous platform, while computing
with highest frequency, each node consumed power proportional to its computing power which 80\% of it was
dynamic power and the rest was 20\% for the static power, the same assumption was made in \cite{Our_first_paper,Rauber_Analytical.Modeling.for.Energy}.
Finally, These nodes were connected via an ethernet network with 1 Gbit/s bandwidth.
respectively for all the benchmarks according to the number of used nodes. As shown in the first plot,
the energy saving percentages of the benchmarks MG, LU, BT and FT are decreased linearly when the the
number of nodes is increased. While for the EP and SP benchmarks, the energy saving percentage is not
-affected by the increase of the number of computing nodes, because in these benchmarks there are no
-communications. Finally, the energy saving of the GC benchmark is significantly decreased when the number
+affected by the increase of the number of computing nodes, because in these benchmarks there are little or
+no communications. Finally, the energy saving of the GC benchmark is significantly decreased when the number
of nodes is increased because this benchmark has more communications than the others. The second plot
shows that the performance degradation percentages of most of the benchmarks are decreased when they
run on a big number of nodes because they spend more time communicating than computing, thus, scaling
