1 <?xml version="1.0" encoding="UTF-8" standalone="yes" ?>
2 <block_impl ref_name="generator-cst.xml" ref_md5="">
4 <author firstname="stephane" lastname="Domas" mail="sdomas@univ-fcomte.fr" />
5 <date creation="2015-05-10" />
6 <related_files list=""/>
8 This component is a generator of a sequence of V fixed values, followed by Z idle cycles.
17 <package name="std_logic_1164" use="all"/>
18 <package name="numeric_std" use="all"/>
27 <delta value="$seq_length+$idle_length" />
30 <production counter="">
31 <output name="data_o" pattern="1{$seq_length}X{$idle_length}" />