+<?xml version="1.0" encoding="UTF-8" standalone="yes" ?>
+<block_impl ref_name="generator-cst.xml" ref_md5="">
+ <comments>
+ <author firstname="stephane" lastname="Domas" mail="sdomas@univ-fcomte.fr" />
+ <date creation="2015-05-10" />
+ <related_files list=""/>
+ <description>
+ This component is a generator of a sequence of V fixed values, followed by Z idle cycles.
+ </description>
+ <notes>
+ No notes
+ </notes>
+ </comments>
+
+ <libraries>
+ <library name="IEEE">
+ <package name="std_logic_1164" use="all"/>
+ <package name="numeric_std" use="all"/>
+ </library>
+ </libraries>
+
+ <architecture>
+
+ </architecture>
+
+ <patterns>
+ <delta value="$seq_length+$idle_length" />
+ <consumption>
+ </consumption>
+ <production counter="">
+ <output name="data_o" pattern="1{$seq_length}X{$idle_length}" />
+ </production>
+ </patterns>
+</block_impl>